NOTICE: The Processors Wiki will End-of-Life on January 15, 2021. It is recommended to download any files or other content you may need that are hosted on processors.wiki.ti.com. The site is now set to read only.
LPDDR
Contents
Summary[edit]
Low Power Double Data Rate memory (LPDDR) is also called Mobile DDR (MDDR). This form of memory operates at 1.8 volts as opposed to the more traditional 2.5 volts and is commonly used in portable electronics. As with all DDR memory, the double data rate is achieved by transferring data on both clock edges of the device. The following table describes LPDDR in relation to interfacing with the OMAP3530 device.
Supported devices | Any JEDEC 209 compliant device |
Supported Size | Up to 1 Gigabyte |
Max Clock Speed | 266 MHz* (see note 1) |
Device Count | 1 or 2* (see note 2) |
Data Width (bits) | 16 or 32 |
Note 1: Higher speed grades are supported due to inherent JEDEC LPDDR backwards compatibility
Note 2: 1 x16 LPDDR device is used for 16 bit LPDDR memory system. 1x32 or 2x16 LPDDR devices are used for a 32 bit LPDDR memory system.
Supported Devices[edit]
Any JEDEC 209 compliant device.
Related Documents[edit]
Please refer to this section of the OMAP3530 data sheet for more details about LPDDR and OMAP3530.
OMAP3530 SDRC
Block Diagrams[edit]
Example for interfacing to OMAP SDRC[edit]
The following link describes how to connect an external memory module to the OMAP3530 SDRC and calculate the timing parameters for the device.
Connecting a 512MB module to OMAP3530 SDRC (see section 11.2.6.3 Typical SDRC connection to an External SDRAM Device)
A 512 Mb mobile DDR SDRAM memory with the following characteristics has been chosen:
Type | Mobile DDR SDRAM |
Size | 512 Mbits (8M ´ 16 ´ 4 banks) |
Data bus | 16-bit width |
Speed | 133-MHz clock frequency, 7.5-ns clock period |