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DM37x Hardware Design Guide
Hardware Design Timeline →[edit]
Introduction[edit]
Welcome to the Hardware Design Guide. The purpose of this guide is to walk hardware designers through the various stages of designing a board on this platform. The guide follows the structure shown in the Hardware Design Timeline above. Each design stage in the Timeline links to a collection of useful documentation, application notes, and design recommendations pertaining to that stage. Using this Guide, hardware designers can efficiently locate the resources they need at every step in the board design flow.
Constructing the Block Diagram[edit]
The first step in designing the hardware platform is to create a detailed block diagram. The block diagram should contain all major system ICs and illustrate which I/O ports are used for device interconnection. Below is a collection of resources to aid in the Block Diagram creation process.
- The DM37x EVM is always a good source from which to start building a reference design. The technical documentation for the EVM is available from Mistral SOlutions and includes a block diagram.
- In addition, there are a series of application specific block diagrams with suggested part numbers for your reference
Selecting the Boot Mode[edit]
The block diagram should also indicate which interface will be used for booting this device. In the DM37x family, a primary ROM boot loader runs first. The ROM will attempt to boot from each boot source in the defined boot sequence. If the first boot source fails to boot, the ROM will move on to the next one in the sequence. Keep in mind that some boot sources take some time to timeout if that boot source isn't avaiable.
- Read the following document to learn about the possible boot options
- The following wiki has good overview on initialization process, including booting.
- Key Boot Considerations:
- It is recommended to include population options for other boot modes to aid in development
- Boot pins have other functions after reset. Make sure your board design takes this into account when choosing pullup/down resistors for the boot pins.
- It is recommended to include population options for other boot modes to aid in development
Confirming Pin Multiplexing Compatibility[edit]
The device uses internal pin multiplexing to allow for maximum functionality in the smallest and lowest cost package. Due to this pin multiplexing, not all processor interfaces are always available simultaneously.See the Terminal Functions section of the datasheet for complete details on the pin multiplexing.
The Pin MUX Utility is a Windows-based software tool that provides a Graphical User Interface for configuring pin multiplexing settings, resolving conflicts and specifying I/O cell characteristics for TI processors, including: AM389x, AM35x, AM/DM37x, C6A816x, DM816x and OMAP35x Processors. Results are output as C header files in the format used by the U-BOOT initialization software found in the Linux Software Development Kit (SDK).
Confirming Electrical and Timing Compatibility[edit]
A key step in the hardware design before beginning schematic capture is to confirm both DC and AC electrical compatibilitly between this devices and the other ICs connected to it.
- The DM3730/25 datasheet has important information with regards to timing and electrical characteristics.
- IBIS model DM37x devices can be found here
- PCB layout specifications/reccomendations that would eliminate the need to perform electrical analysis.
Designing the Power Subsystem[edit]
Once the block diagram has been validated for pin multiplexing, electrical, and timing compatibility, the power sub-system can be designed. See the below resources on estimating power consumption and designing a matching power subsystem.
- Key Considerations:
- Make sure to follow the supply sequencing requirements listed in the datasheet
- Make sure to properly filter the PLL power supply according to the recommendations listed in the datasheet
DM37x Power Estimation Spreadsheet
Designing the Clocking Subsystem[edit]
In addition to the power subsystem, the clocking subsystem needs to be designed to provide appropriate clocks to all ICs in the system. These clocks can be created by pairing crystals with internal osciallators within the system ICs, or they can be created by a separate clock generator. See the below information on designing the clocking subsystem for your design.
The device operation requires the following three input clocks:
- A 32-kHz clock is used for low frequency operation. It supplies the wake-up domain for operation in lowest power mode (off mode).
- The system alternative clock can be used to provide alternative 48 MHz or 54 MHz.
- The system input clock (12, 13, 16.8, 19.2, 26, or 38.4 MHz) is used to generate the main source clock of the device. It supplies the DPLLs as well as several other modules.
Floorplanning the PCB[edit]
Before beginning schematic capture, it is recommended to floorplan the system PCB to determine the interconnect distances between the various system ICs. See the below information on floorplanning your PCB.
- TBD: Why and How to floorplan your PCB before starting schematic capture
Creating the Schematics[edit]
At this point in the design, it is time to start capturing the schematics. See the below collection of information to aid you in creating the scheamtics.
- Key Considerations:
- SDRAM (and other) output clocks are internally looped back
- Don’t forget to install a JTAG connection
- JTAG: Make sure to use the RTCK pin
- It is often helpful to refer to example schematics throughout the schematic capture process; DM37x EVM schematics available here
- Make sure to use the canned schematics in the datasheet for the following interfaces:
- DDR
- Below is a collection of articles showing example connections of various components
Design in Guide for TPS65023 Design in Guide for TPS65073
- During and after schematic capture, check your design against the DM37x schematic checklist
- Below is a link to the IBIS Simulation Models to aid in the design of the device interconnects:
- Below is a link for selecting and placing decoupling capacitors in a BGA design
- Decoupling Capacitor Selection and Placement for BGAs
Laying out the PCB[edit]
After completing schematic capture, see the below information on laying out the PCB:
- It is often helpful to refer to an example layout when designing a custom PCB such as DM37x EVM Layout
- Make sure to follow the Layout Specifications for the following Critical Interfaces:
- DDR - See Datasheet
- SATA - See datasheet
- General Information Articles:
Testing/Debugging[edit]
Once your custom CB has been produced and assembled, refer to the below information on bringing-up and debugging the system.
In the DM37x platform, the DSP and video accelerators are often treated as a black-box and most of the development and debugging is done on the ARM Cortex-A8 side.
For some advice on debugging on Linux refer to debugging overview article
In addition, there are many useful wiki articles on debugging on this site, all you need to do is search. Many of these articles were written some time ago for various platforms that were available at that point; however, many are still applicable to other processors available today.