AM/DM37x Power Estimation Spreadsheet

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Abstract

This article discusses the power consumption of the Texas Instruments AM/DM37x high-performance applications and multimedia processor. Power consumption on the AM/DM37x device is highly application-dependent, therefore a spreadsheet is provided to model power consumption for a user’s application and to present some measured scenarios. Version 1.x of the spreadsheet supports configurability of device core modules such as the ARM Cortex-A8, DSP and most peripherals. The data in the accompanying spreadsheet represents measurements and estimates for strong units, which are indicative of the expected maximums of power consumption for production units. Thus, the spreadsheet values may be used for board thermal analysis and power supply design as a maximum long-term average. The spreadsheet does not represent power savings possible with AM/DM37x SmartReflex features such dynamic power switching (DPS) or adaptive voltage scaling (AVS).

The data presented in the Version 1.x power estimation spreadsheet are based on measurements performed on DM3730 revision 1.0 silicon, as well as estimates.

The Power Estimation Spreadsheet

Version 1.01 is the latest version of the AM/DM37x Power Estimation Spreadsheet.

The spreadsheet applies to AM3703, AM3715, DM3725 and DM3730 devices.

Modeling Power for an Active Scenario

Power consumption estimates in the spreadsheet are separated by the major modules of the device, so that their contribution can be gauged independently of each other. The options in the spreadsheet are intended to provide some flexibility in customizing the worst case power consumption estimate for a specific application.

Power consumption in the AM/DM37x device consists of:

• static power – due to leakage current, and dependent on temperature; and
• active power – due to transistor switching, and independent of temperature.

Version 1.x of the AM/DM37x Power Estimation Spreadsheet models temperature effects on device power consumption. The user is allowed to specify an junction temperature to be used in the power estimate. This is used to scale device static power which is dependent on temperature.

Active power consumption is the power that is consumed by portions of the AM/DM37x that are performing some processing. Active power is independent of temperature, but dependent on voltage and module activity levels. Version 1.x of the AM/DM37x Power Estimation Spreadsheet allows configuration of activity for some modules in the AM/DM37x device. For other modules, estimated scenarios are provided for the module, and the user is expected to select the usage scenario most closely aligned to the intended application.

Using the Power Estimation Spreadsheet

The Version 1.x power estimation spreadsheet consists of 4 sections: tables A, B, C, and D. Using the power estimation spreadsheet involves simply entering appropriate usage parameters. Cells that are designed for user input are white in color. To use the spreadsheet, simply configure the white cells to a value most closely aligned with your intended scenario. The spreadsheet will display the details of power consumption for the configuration selected.

Briefly, the purpose of each of the 4 sections is:

• Section A: configure the high-level system configuration such as ambient temperature and processors OPP.
• Section B: active power of ARM and IVA subsystem components.
• Section C: active power of peripherals and graphics accelerator.
• Section D: full chip power tally.

Section A: High-Level System Configuration

This section allows the user to set an junction temperature (not ambient temperature) between 0C and 105C, and an operating performance point (OPP) for the ARM and IVA subsystems, as shown in Figure 1.

Figure 1. Section A of AM/DM37x power estimation spreadsheet allows configuration of ambient temperature and processors' OPP.

The OPP options supported for the ARM and IVA subsystems voltage domain (VDD_MPU_IVA) are shown in Table 1 below.

Table 1. Operating performance point definitions for the processor subsystems.

Processors' OPP	VDD_MPU_IVA (V)	ARM MHz	IVA MHz
50	0.93	300	260
100	1.1	600	520
130	1.26	800	660
1G	1.35	1000	800

For modules powered by the VDD_CORE rail, the default nominal OPP (OPP3) is assumed with the configuration for voltage and interconnect clocks shown in Table 2 below.
Table 2. OPP3 definition for VDD_CORE components.

Parameter	Value
Interconnects/Peripherals OPP	100
VDD_CORE voltage	1.137V
CORE_CLK frequency	400MHz
L3_ICLK frequency	200MHz
L4_ICLK frequency	100MHz
SGX_ICLK frequency	192MHz
SDRC_CLK frequency	200MHz
GPMC_CLK frequency	100MHz

The spreadsheet presents information for only the full-featured DM3730 device in AM/DM35x family. However, since the spreadsheet breaks out the power consumption due to each module in the DM3730, estimates for the DM3725, AM3715 and AM3703 can be obtained by choosing the “N/A” or “off” option for the module not present in the device under consideration. This will ensure active power from the non-applicable module is not included in the power tally. The device differences are summarized as follows:

• DM3730 (device with ARM, IVA and SGX)
• DM3725 (device with ARM and IVA)
• AM3715 (device with ARM and SGX)
• AM3703 (ARM only device)

Section B: VDD_MPU_IVA/VDD1 (Modules Active Power)

This section is used to configure the activity on the ARM and IVA subsystems as shown in Figure 2. For each subsystem, a user can select a power profile and enter module utilization as a percentage.

Figure 2. Section B of the AM/DM37x Power Estimation Spreadsheet allows configuration of the ARM and IVA subsystem components for active power estimation.

For most modules, the following power profiles are included:

• N/A – no active power contribution
• Estimated max – maximum power from design simulations.

Power profiles for the ARM subsystem include:

1. Off – MPU power domain is off. no active and leakage current.

1. Inactive (Leakage Only) - MPU power domain is on. Clock is gated. No active power contribution
2. Estimates (max) – Max (Peak) power estimates based on mA/MHz/V number for Cortex-A8 with Neon usage, obtained from design simulations.
3. Dhrystone standalone (Cortex-A8, measured) – based on measurements done while running Dhrystone 2.1 on the Cortex-A8.

Power profiles for the IVA subsystem include:

1. Off – IVA power domain is off. no active and leakage current.
2. Inactive (Leakage Only) – IVA power domain is on. Clock is gated. No active power contribution.
3. Estimates (Peak)– Max (Peak) power estimates based on mA/MHz/V numbers with margining, for the IVA subsystem components, obtained from design estimates.
4. Estimates (Average) – Average power estimates based on mA/MHz/V numbers with margining, for the IVA subsystem components, obtained from design estimates.

Module utilization is the percentage of the available MHz at the selected OPP needed to meet the scenario processing requirement. A single utilization entry is provided for the ARM subsystem. For the IVA subsystem, a separate utilization entry is provided for each of the following IVA subsystem components:

1. DSP (C64x+ Digital Signal Processor)
2. iLF (improved Loop Filter)
3. iME (improved Motion Estimator)
4. iVLCD (improved Variable-Length Coder/Decoder)
5. SEQ (Sequencer)

The ARM and IVA clock frequencies are set by the “Processors OPP” selection available in Section A.

Section C: VDD_CORE/VDD2 (Modules Active Power)

Section C enables a customized active power configuration for modules powered by the VDD_CORE or VDD2 supply rail in the AM/DM37x as shown in Figure 3 below.

Figure 3. Section C of the AM/DM37x Power Estimation Spreadsheet allows for the configuration of peripherals for active power estimation.

For each module, a drop-down menu of measured and estimated power profiles is provided. Details of the power profiles follow.

• SGX (2D/3D graphics accelerator engine):

1. N/A (Leakage) – no active power contribution.
2. Estimates (192MHz) – estimated power from design simulations.

• SDMA (system direct memory access controller):

1. N/A (Leakage) – no active power contribution.
2. Estimates – estimated power from design simulations.

• SDRC (SDRAM controller):

1. N/A (Leakage) – no active power contribution.
2. Estimates – estimated power from design simulations.

• GPMC (general purpose memory controller):

1. N/A (Leakage) – no active power contribution.
2. Estimates – estimated power from design simulations.

• DSS (display sub-system):

1. N/A (Leakage) – no active power contribution.
2. Estimates 1280x720, 60fps, 32bpp – estimated power from design simulations.

• CAM/ISP (camera/image signal processing sub-system):

1. N/A (Leakage) – no active power contribution.
2. Estimates 1280x720, 60fps, 32bpp – estimated power from design simulations.

• USB (universal serial bus):

1. N/A (Leakage) – no active power contribution.
2. Estimates – estimated power from design simulations.

• MMC (multimedia card host controller) 1, 2 and 3 have the same set of power profile options:

1. N/A (Leakage) – no active power contribution.
2. Estimates – estimated power from design simulations.

• McBSP (multi-channel buffered serial port) 1, 2, 3, 4 and 5 have the same set of power profile options:

1. N/A (Leakage) – no active power contribution.
2. Estimates – estimated power from design simulations.

• L4 PER Modules:

1. N/A (Leakage) – no active power contribution.
2. Estimates – estimated power from design simulations.

Section D: FULL CHIP POWER TALLY

This section allows the user to obtain a power consumption estimate for the full chip. For each power supply rail available on the AM/DM37x, a set of power profiles is provided in a drop-down menu.

Figure 4. Section E of the AM/DM37x Power Estimation Spreadsheet provides a full chip power consumption estimate.

Available power profiles for the various power rails on AM/DM37x are documented below. The Standby Modes 1, 2, 3 and 4 are defined as in Figure 5 and Figure 6. Note that:

• VDD1 is the ARM and IVA subsystems voltage domain supplied by VDD_MPU_IVA rail,
• VDD2 is the interconnects and peripherals voltage domain supplied by VDD_CORE rail,
• VDD3 is the wakeup voltage domain powered by an embedded LDO supplied by the VDDS_WKUP_BG rail, and
• VDD4 and VDD5 are the embedded memories voltage domains powered by embedded LDOs supplied by the VDDS_SRAM rail.

Figure 5. The states of VDD1, VDD2 and VDD3 voltage domains in AM/DM37x in 4 standby modes.

Figure 6. The states of VDD4 and VDD5 voltage domains in AM/DM37x in 4 standby modes.

Off-mode (or Device Off-mode) is the lowest power state from which the AM/DM37x can still wakeup autonomously. In this device state all domains are powered off except for the wakeup domain (VDD3). The unused external supplies can also be shut off to conserve power. Off-mode is distinct from Full Off, where no part of the AM/DM37x is powered on.

• VDD_MPU_IVA/VDD1:

1. Customized scenario above – sum of power for the ARM and IVA subsystems as configured in section B.
2. Standby1 – see figures 5 and 6.
3. Standby2 – see figures 5 and 6.
4. Standby3 – see figures 5 and 6.
5. Standby4 – see figures 5 and 6.
6. Off-mode – power during Device Off-mode.

• VDD_CORE/VDD2:

1. Customized scenario above – sum of power for the ARM and IVA subsystems as configured in section C.
2. Standby1 – see figures 5 and 6.
3. Standby2 – see figures 5 and 6.
4. Standby3 – see figures 5 and 6.
5. Standby4 – see figures 5 and 6.
6. Off-mode – power during Device Off-mode.

• VDDS_DPLL_DLL:

1. Estimates - estimated power from design simulations.
2. Estimated max – maximum power from simulations.
3. Standby1 – see figures 5 and 6.
4. Standby2 – see figures 5 and 6.
5. Standby3 – see figures 5 and 6.
6. Standby4 – see figures 5 and 6.
7. Off-mode – power during Device Off-mode.

• VDDS_DPLL_PER:

1. Estimates - estimated power from design simulations.
2. Estimated max – maximum power from simulations.
3. Standby1 – see figures 5 and 6.
4. Standby2 – see figures 5 and 6.
5. Standby3 – see figures 5 and 6.
6. Standby4 – see figures 5 and 6.
7. Off-mode – power during Device Off-mode.

• VDDS_SRAM:

1. Estimates - estimated power from design simulations.
2. Estimated max – maximum power from simulations.
3. Standby1 – see figures 5 and 6.
4. Standby2 – see figures 5 and 6.
5. Standby3 – see figures 5 and 6.
6. Standby4 – see figures 5 and 6.
7. Off-mode – power during Device Off-mode.

• VDDS_WKUP_BG:

1. Estimates - estimated power from design simulations.
2. Estimated max – maximum power from simulations.
3. Standby1 – see figures 5 and 6.
4. Standby2 – see figures 5 and 6.
5. Standby3 – see figures 5 and 6.
6. Standby4 – see figures 5 and 6.
7. Off-mode – power during Device Off-mode.

• VDDS:

1. Estimates - estimated power from design simulations.
2. Estimated max – maximum power from simulations.
3. Standby1 – see figures 5 and 6.
4. Standby2 – see figures 5 and 6.
5. Standby3 – see figures 5 and 6.
6. Standby4 – see figures 5 and 6.
7. Off-mode – power during Device Off-mode.

• VDDS_MEM:

1. Estimates - estimated power from design simulations.
2. Estimated max – maximum power from simulations.
3. Standby1 – see figures 5 and 6.
4. Standby2 – see figures 5 and 6.
5. Standby3 – see figures 5 and 6.
6. Standby4 – see figures 5 and 6.
7. Off-mode – power during Device Off-mode.

• VDDS_MMC1,VDDS_X:

1. Estimates - estimated power from design simulations.
2. Estimated max – maximum power from simulations.
3. Standby1 – see figures 5 and 6.
4. Standby2 – see figures 5 and 6.
5. Standby3 – see figures 5 and 6.
6. Standby4 – see figures 5 and 6.
7. Off-mode – power during Device Off-mode.

• VDDA_DAC:

1. Active
2. Off, 0V – powered off.
3. Standby1/2/3/4 or Off-mode – see figures 8 and 9.
4. Estimated max – maximum power from simulations.

Important Notes and Limitations

The following notes and limitations apply to Version 1.x of the AM/DM37x Power Estimation Spreadsheet:

• Effect of temperature on static power is modeled via the junction temperature input. A linear extrapolation is performed on simulation estimates taken at junction temperatures of 0°C, 35°C, 70°C and 105°C.
• Power saving effects of SmartReflex Adaptive Voltage Scaling (AVS) are not modeled. The spreadsheet is based on simulation estimates taken on strong (also known as hot or fast) silicon without enabling AVS. Thus, the spreadsheet provides worst case power. Enabling AVS in a real application will optimize the power consumption by scaling the device operating voltage to match the silicon performance capability. AVS will result in lower actual power consumption on VDD_MPU_IVA and VDD_CORE.
• Power-saving effects of Dynamic Power Switching (DPS) are not modeled. Baseline power assumes DPS is disabled. Again, the spreadsheet provides a worst case power estimate for a customized scenario. DPS will typically enable a real application to achieve power savings for active processing scenarios by gating clocks and power to portions of the device that are temporarily idle.
• Only the nominal OPP3 is supported for VDD_CORE. This power rail supplies the device interconnects and peripherals.
• The power consumption data are based on simulation estimates supplemented with silicon measurements.
• It is up to the user to input reasonable utilization numbers for the MPU and IVA subsystems for the purposes of maximum power analysis. 90-100% loading on either subsystem is not realistic for most application scenarios.

References

1. OMAP3530 Power Consumption Summary ([1] Literature Number SPRAB98).

Revision History

Date	Modification
6/2/10	Version 1.00. Initial version.
5/6/11	Version 1.01. Added support for power domain off in MPU and IVA power domains. Updated max power number for Cortex-A8 and IVA base on feedback from bench measurements.