EVE

EVE block diagram from Empowering automotive vision with TI’s Vision AccelerationPac, OCTOBER 2013:

publications

TI’s new TDA2x SoC family of devices, complete with a heterogeneous scalable architecture, provides the optimal solution. The custom Vision AccelerationPac leverages the purpose built Embedded Vision Engines (EVEs), working in tandem with industry leading DSP and ARM® cores. Each Embedded Vision Engine in the Vision AccelerationPac can provide more than 8x compute performance at the same power budget for advanced vision analytics in a more costeffective footprint, bringing to life the broadest and most advanced portfolio of ADAS applications. Source: Driving the Future TI’s Automotive Perspectives 2013, OCTOBER 2013

• EVE
  • Up to 4 EVE units are part of the TDA2x SoC for Automotive Vision / ADAS; http://www.eetimes.com/document.asp?doc_id=1319796
  • Press release about TDA2x; a few links back to information on TI pages; http://investor.ti.com/releasedetail.cfm?ReleaseID=797735
  • EVE is a unit of C6A8149; http://rtsc.eclipse.org/cdoc-tip/ti/platforms/evmC6A8149/package.html
  • EVE is a unit of some other TI SoCs; various XDC related files on TI pages of the form "package ti.platform.*" & "module ti.catalog.*" & http://rtsc.eclipse.org/cdoc-tip/ti/catalog/arp32/package.html
  • EVE is an obvious part of Vision Mid EVE (related to TI814x); http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/223172.aspx
  • EVE seemingly appears in the SoC design in a similar fashion like other well known mega modules; "Back Over Prevention (BoP) Application in AV BIOS SDK for VisionMidEVE" 2235.bop_eve_techbrief.pdf - SEPTEMBER 2012
  • EVE consists of ARP32 and VCOP; Empowering automotive vision with TI’s Vision AccelerationPac - OCTOBER 2013
  • ARP32 can access a set of memories, parts are dedicated for video processing & VCOP program storage; http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/rtsc/3_22_00_09/exports/docs/cdoc/ti/catalog/arp32/ARP32.html
    • The module version of EVE/ARP32 is sometimes attributed as V210; http://downloads.isee.biz/pub/files/igep-dsp-gst-framework-3_40_00/tools/xdctools/xdctools_3_23_00_32/packages/ti/targets/elf/arp32/ARP32.xdc
    • The module version of <?>/T16 is sometimes attributed as V200; http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/rtsc/3_20_07_86/exports/docs/cdoc/ti/catalog/t16/T16v200.html
  • There is a compiler & a simulator for EVE; http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/p/185416/668111.aspx - APRIL 2012
    • The compiler version is at least 1.0; http://processors.wiki.ti.com/index.php/Language_Options_in_TI_Compilers
    • Compiler and tools for EVE/ARP32/VCOP have maintenance entries in the Compiler Defects Database
    • Some files representing an ARP32 targeted xdc package including a few headers & sources can be found here
  • There is a Traffic Sign Recognition Demo (TSR) for ARP32 in AV-BIOS-SDK/AV-SDK; http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/p/248903/875667.aspx - MARCH 2013
  • XDC was made aware of a bunch of modules for APR32; http://rtsc.eclipse.org/cdoc-tip/ti/targets/arp32/elf/ARP32.html
    • XDC release notes v3.23.3.53 dated April 30, 2012 does state: "Added C6A8149 catalog files and evmC6A8149 platform package (CentEVE)."
      (This might hint for a SoC variant of Centaurus/DM814x that includes an EVE unit.)
  • EVE was mentioned in "DEDF2012-Chepurin-TI-DaVinci-processors.pdf", MARCH 2011 on the page 7 road map as a component of the "DM HP Next (2013)" silicon.
  • EVE was mentioned in "DM37x_Quick Overview.pdf", JULY 2012 on the page 5 road map as a component of the "DisplayDM HP Next" silicon.

• There were a presentation at 9th IEEE Embedded Vision Workshop, JUNE 2013 in Portland, Oregon, USA with headline & abstract:

"EVE: A Flexible Processor for Embedded Vision Applications, Jagadeesh Sankaran (Texas Instruments)"

"The Embedded Vision/Vector Engine (EVE) is a specialized fully programmable processor to accelerate computer vision algorithms. The architecture’s principal aim is to enable low latency, low power, and high performance vision algorithms in cost sensitive embedded markets. EVE’s memory architecture is unique and differentiated relative to standard processor architectures, allowing for a high degree of sustained internal memory bandwidth for compute intensive algorithms. EVE‘s architecture also has built-in features for enhanced safety, which are crucial to develop, mission critical systems. The presence of custom pipelines and units, allows for accelerating and harnessing the high levels of data parallelism found in computer vision algorithms. This presentation will review the key processing needs and challenges found in algorithms in advanced driver assistance systems (ADAS) markets. It then motivates the need for a dedicated processor that adds specialized units and pipeline stages to accelerate challenging processing requirements. EVE complements the standard C6000 DSP from Texas Instruments by excelling at low-level and mid-level vision algorithms, freeing up the DSP to leverage VLIW and excel at high level processing algorithms such as classifiers. We will also briefly review the programming paradigms to take advantage of a highly parallel specialized data path from a high level language, while still giving developer’s a clear path to developing optimized applications. The combination of DSP and EVE in TI’s SOC’s allows developers to harness new levels of performance, drastically reducing the time to market for developing performance-intensive safety-critical ADAS applications."

• • Jagadeesh Sankaran is reported to be in position of Chief Architect, Embedded Vector Engine (EVE), Vision AccelerationPac for Texas Instruments since January 2009.

• There were already some technology talk about EVE in July 2013 in Vienna. It was announced with that lines:

"The Embedded Vision/Vector Engine (EVE) is a specialized fully programmable processor to accelerate computer vision algorithms. The architecture’s principal aim is to enable low latency, low power, and high performance vision algorithms in cost sensitive embedded markets. EVE’s memory architecture is unique and differentiated relative to standard processor architectures, allowing for a high degree of sustained internal memory bandwidth for compute intensive algorithms. The presence of custom pipelines and units, allows for accelerating and harnessing the high levels of data parallelism found in computer vision algorithms. This presentation will review the key processing needs and challenges found in algorithms in advanced driver assistance systems (ADAS) markets. It then motivates the need for a dedicated processor that adds specialized units and pipeline stages to accelerate challenging processing requirements. EVE complements the standard C6000 DSP from Texas Instruments by excelling at low-level and mid-level vision algorithms, freeing up the DSP to leverage VLIW and excel at high-level processing algorithm. The combination of DSP and EVE in TI’s SOC’s allows developers to harness new levels of performance, drastically reducing the time to market for developing performance-intensive safety-critical ADAS applications." - Source: http://perception.tuwien.ac.at/docs/Talk_EVE.pdf

see also

• TDA1MEV
• TDA2x
• TDA3x