TraceCCSFeatures

What's in CCS to facilitate trace

• Trace System Control

- Trace System Control is used to:

=> Select the trace capture mechanism (external XDS or internal ETB).

=> Setup trace system wide parameters - data export parameters, trace collection parameters, global chip configuration parameters (parameters that don't apply to a single Trace Job) and starts the calibration process.

• Trace Jobs

- Trace Jobs are used to setup specific trace triggers and what to trace when the trigger is active.

• DVT Trace Data Display

- Provides navigation, search and filter capabilities of the decoded trace data

ETB Trace System Control

- If the Trace Control panel does not show "ETB Selection" at the top then use the Receiver button to select the ETB.

- Once the ETB Receiver is selected, you only need to apply (or OK) any Trace Control parameter changes. If you are satisfied with the current ETB Trace Control parameters use the Cancel button to minimize the Trace Control window.

- ETB Type Typically this can be left set to Auto. With Auto the trace sw will attempt to determine the ETB type.

- Execution Synchronization

=> Trace recording started when device running

=> Trace recording stopped when device halted

=> Note: If Execution Synchronization is disabled you must manually start and stop trace from the Trace Display

- Trace Buffer Type for ETB circular buffer is typically the only type available (but this is dependent on the ETB Type)

- Trace Control Apply and OK buttons used to apply changes in the Trace Control parameters

=> If when the first Trace job is enabled you have not made any Trace Control parameter changes, trace recording is started automatically (using the previous Trace Control parameters.

- Advance Settings

=> Global stream enable allows trace streams to be disabled without modifying trace jobs. Can be used to help determine trace data gap problems.

=> Stall CPU if trace export bandwidth exceeds ETB bandwidth

=> Trace Real-Time Interrupts applies to emulation real-time mode only, enables trace of interrupts that occur while the processor is halted

=> Trace Time of Emulation Halts good when running application with CIO to determine how long the processor is halted at the CIO software breakpoint

=> Export frame size larger frame size minimizes overhead, smaller frame size reduces data loss when the buffer wraps

- Can not change Trace Control parameters without stopping trace collection

- No requirement to halt target execution to start ETB trace recording

- See Embedded Trace Buffer for additional ETB information.

XDS Trace System Control

- If the Trace Control panel does not show "Select Pins" at the top then use the Receiver button to select the 560 Trace Pod.

- Once the 560 Trace Pod Receiver is selected, you only need to apply (or OK) any Trace Control parameter changes. If you are satisfied with the current Trace Control parameters use the Cancel button to minimize the Trace Control window.

- Select Pins

=> More pins more bandwidth

=> When using EMU0 and/or EMU1 for external triggers, pin-out selection typically allows you to exclude these as trace pins.

=> Pin-out changes require a new calibration

- Receiver Buffer Size (256KB to 64MB)

- Trace Buffer Type (select stop on buffer full or circular buffer mode)

- Execution synchronization

=> Trace recording started when device running

=> Trace recording stopped when device halted

=> Note: If Execution Synchronization is disabled you must manually start and stop trace from the Trace Display

- Trace Control Apply and OK buttons start calibration if required. After calibration the 560 Trace Pod is set to the recording state.

=> Changes to pin-out or export clock rate (Advance window) require a new calibration

=> If when the first Trace job is enabled, if trace calibration has not previously been completed through Trace Control, trace calibration is launched automatically (using the previous Trace Control parameters) and trace recording is started.

- Advance modes

=> Global stream enable allows trace streams to be disabled without modifying trace jobs. Can be used to help determine trace data gap problems.

=> Stall CPU if trace export bandwidth exceeds pin export bandwidth

=> Trace Real-Time Interrupts applies to emulation real-time mode only, enables trace of interrupts that occur while the processor is halted

=> Trace Time of Emulation Halts good when running application with CIO to determine how long the processor is halted at the CIO software breakpoint

=> Export Frame Size larger frame size minimizes overhead, smaller frame size reduces data loss when the buffer wraps

=> Export clock rate if your target design causes slow calibration you can force calibration initially to a slower clock rate

- Can not change Trace Control parameters without stopping trace collection

- No requirement to halt target execution to start trace calibration or trace recording

Trace Jobs

- Configured through the CCSv4 breakpoint view window (View->Breakpoints).

- Use New Breakpoint pull-down menu to select a Trace job. This populates a new Trace job in the Breakpoints window.

- Select the Trace job in the Breakpoint window and right-click on it get a menu from which you select properties.

- From the trace Properties window select Standard or Event trace types:

=> Standard Trace

-> Select one trace Action per trace job

• Trace On - Start trace immediately
• Start Trace - Conditionally start trace on execution of a PC Address, access to a memory, or on an Event

- PC point or range, with delay or skip counts

- Data memory write or read (point or range), with data and a mask, and delay or skip counts

- Memory, stall or system events (interrupts, AEGEVTs), with delay or skip counts

• End Trace - Conditionally end trace on execution of a PC Address, access to a memory, or on an Event

- Same trigger options as Start trace

• Trace In Range - Start Trace when any PC within the range is executed, Stop trace when any PC outside of the range is executed

- PC Start and end addresses

• Don't Trace in Range - Start Trace when any PC outside the range is executed, Stop trace when any PC inside of the range is executed

- PC Start and end addresses

• Trace Variable - Trace accesses (read or write) to a specific memory location

- Data Address, Read or Write access, and Access width

• Store Sample - Conditionally trace a single sample when the trigger conditions are valid. Trace is started by the trigger condition and stopped when the condition is no longer valid. You will typically get two samples ( one sample when trace is enabled and a second sample where trace is disabled)

- Same trigger options as Start trace

• Don't Store Sample - Opposite of Store Sample

- Same trigger options as Start trace

• Insert Trace Marker - Mark a single occurrence of the trigger action. Only the first occurrence of the trigger condition is marked. The Trace Marker is re-armed when trace recording is started again.

- Same trigger options as Start trace

• End All Trace - On the trigger condition stop all trace, stop recording, and automatically update the trace display.
• User Scripts - The following predefined triggers can be used to collect trace data for TI provided scripts.

- Statistical profiling

- Dynamic thread aware call graph

- Pipeline stall analysis

-> Select What to Trace

• PC, Timing and Data combination's (read data, read address, write data, write address, and PC with Data).
• "PC with Data" aligns the data access to the PC of the instruction. If this is not selected data accesses are displayed separately from the corresponding PC.

-> When entering Trace job properties (like an address) you may use symbolic names.

-> You can start multiple trace streams (with one or more Start Trace jobs) and then selectively stop streams (with one or more End Trace jobs).

-> Start and End trace jobs can trigger multiple times. A Start Trace job that has been ended will re-trigger if its trigger conditions are satisfied.

-> An End All Trace job will only trigger once during a trace recording session and then re-armed when recording is started again.

=> Event Trace

-> Event trace automatically enables PC and Timing.

-> Select one trace Action per trace job. These are identical in function to the Standard Trace jobs explained above.

• Trace On
• Start Trace
• End Trace
• Trace In Range
• Don't Trace in Range
• Insert Trace Marker
• End All Trace
• User Scripts

-> Select event Category

• Stall
• Memory
• Predication
• External(8)

-> For Stall and Memory events you choose specific events from 4 identical event list.

=> In the trace display memory events are reported in the Memory Event column and stall data reported in the Stall Cycle Data column.

=> In both cases the reported data is in binary form where each bit corresponds to the event list id the event was selected from. (bit 0 is Event 1, bit 1 is Event 2 ...).

=> When memory events are selected, timing data is not generated (because the timing stream is replaced with memory event data). In this case the timing column will behave as if timing is disable showing just minimum number of cycles for each instruction, but no stall timing data is provided.

-> Predication reports if conditional instructions executed or not. The predication information is reported in the Trace Status column of the display.DOES NOT WORK ON c6488 Rev2.1

-> External events are device specific (see the Data Sheet for these). External events are selected through the Megamodule's AEGMUX registers (for TCI6488 see the TMS320C64x+ DSP Megamodule Reference Guide. The AEGMUX registers can be programmed with CCS or from your application.

=>With CCS you can setup the AEGEVTs from the breakpoint manager (view->breakpoints) by using the "New Breakpoint" pull-down menu to select "Set AEGEVT/External(8)".

=>This populates a new Breakpoint job in the Breakpoints window that you will right-click on to get a menu from which you select properties.

=>In the AEGEVT properties page you can then select which events (c64x+ cores provide 128 events to chose from) drive each specific AEGEVT signal.

=>In the trace display external events are reported in the External Event column in binary form where each bit corresponds to a AEGEVT id (bit 0 is AEGEVT[1], bit 1 is AEGEVT[2] ...).

- Multiple trace jobs may be specified and utilized simultaneously (as long as you don't run out of AET resources)

=> If you wanted to see all PCs, but only timing for the PCs within a specific function you could set up two trace jobs, 1) to collect PCs and 2) collect timing in a specific PC range.

=> once you select Standard or Event all other trace jobs must be of the same type.

- If Trace Control was not used to calibrate the target, when the first trace job is enabled, the last (or default) Trace System Control configuration will be used to perform calibration automatically.

Trace Display - Debug Visualization Tool (DVT)

- Display trace data when

=> If Synchronous Execution mode (See ETB Trace Control or XDS Trace Control) the trace display is updated when device execution is halted.

=> If recording is stopped manually (with DVT's Stop menu item) the trace display is updated.

=> If CCS is disconnected while collecting trace data, recording is stopped and the display updated.

=> If an End All Trace job triggers, recording is stopped and the display updated.

- DVT supports display paging allowing quick display of the first page or last page, and then adding sequential pages (forwards or backwards).

=> The page size can be modified from Window->Preferences ( CCS->Advance Tools->Trace Analyzer). You can enter up to 2147483647 if you want to decode all the data in the trace buffer, effectively disabling the paging scheme.

- Can save Trace Data Files (.tdf) for display later or on other PCs.

- Find data in currently displayed pages or Search (all pages) capabilities.

- Filter data from currently displayed pages

- See Understanding timing for details on interpreting the Cycle column.

- Trace Display (DVT) Trace Status column

=> The Trace Status column provides information about the trace data and quality of trace data.

=> When a trace trigger occurs that starts or ends the PC or Timing stream, the PC and timing stream states are reflected in the Trace Status column with messages that indicate:

- "PC collection on"

- "PC collection off"

- "Timing collection on"

- "Timing collection off"

- Both PC and Timing status messages can occur on the same sample.

=> Cycles caused by stalls rather than normal pipeline advances are indicated by "Pipeline Stall" Trace Status. See Understanding timing for details on interpreting the Cycle column.

=> PCs injected into the pipeline from an SPLOOP are marked with "SPLOOP Prolog", "SPLOOP Kernel", and "SPLOOP Epilog" trace status messages.

=> Interrupts and exceptions, the interrupt context switch, and return from interrupt are marked with trace status messages.

=> "Sample not verified" simply means the trace decoder could not complete decoding of the current frame of data. This is typical at the end of data if Trace Control is configured for "Stop on buffer full". It does not necessarily mean there is a problem with the data. If the "Sample not verified" occurred some place other than the end of the data and it is followed by a "Bad..." message then one of the following problems have occurred:

1. The program has executed code outside the load image. If you application is failing this could be the cause.
2. You have self-modifying code. Some kernels (DSP BIOS) and OSs will replace complete ISRs, which will appear as self-modifying code.
3. Your target trace HW interface between the device and XDS connector has an electrical issue (typically this is caused by a termination problem).
4. There is a silicon problem (check your device's errata).

=> If you stop trace collection without an End Trace or End All Trace job, it's common to get "Insufficient" trace status with all the previous trace data in the same frame marked with "Sample not verified".