SitaraWare 01.00.00.09 User Guide

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SitaraWare 01.00.00.09 User's Guide

NOTE
Before starting to use the drivers and applications please read information on how to build and use SitaraWare package.

System Configuration

This section describes the guidelines for programming on the AM1808 SOC System. For detailed description on the SOC, please refer to AM1808 system reference guide.

The ARM Subsystem

The AM1808 contains ARM926 core, associated memories and peripherals. The ARM926 CPU acts as the overall system controller. The ARM can operate in ARM state or Thumb state. The operating modes supported are User Mode(non privileged mode), FIQ mode, IRQ mode, Supervisory mode, Abort mode, System mode and Undefined mode. The AM1808 ARM subsystem also has MMU, and separate 16 kB Instruction Cache and 16 kB Data Cache. CP15 co-processor controls the MMU and Cache.

SitaraWare exports APIs for configuring the CPU to operate in privileged mode or non privileged mode and APIs to configure MMU and Cache. The APIs for configuration of the CPU can be found in /include/am1808/cpu.h and the APIs for configuration of MMU and Cache can be found in /include/am1808/cp15.h

Programming

Applications can execute in privileged or non-privileged (user) mode of ARM. On entry to the main() function of application, the system will be in privileged mode. However, the application can switch to nonprivileged mode (user mode) using CPUSwitchToUserMode() and back to privileged mode using CPUSwitchToPrivilegedMode() at any point of time. While executing in user mode, the application shall not access system resources which needs privileged access. The privileged mode used in SitaraWare is system mode of ARM926 core. Note that all ISRs will be executing in privileged mode.

Separate APIs are provided for enabling/disabling instruction and data cache. Also, APIs are given for invalidation and cleaning of caches. Flushing a cache will clear it of any stored data. Cleaning a cache will force it to write the dirty values to main memory. Note that MMU (Memory Management Unit) shall be enabled before enabling the data cache. Below sequence can be used to configure and use the MMU.

• Creat Page Table. The page table starting address shall be aligned to 16kB.
• Set the translation table base register with the starting address of the page table using TtbSet()
• Enable MMU using MMUEnable

Example Configuration

The example application timerCounter (/examples/evmAM1808/timer/src/) demonstrates the exeucution of application in user mode. On entry to the main(), the execution will be in previleged mode. After calling CPUSwitchToUserMode() application executes in user mode. However, the CPU will have privileges in TimerIsr() since the ISR is executed in IRQ mode, which is a privileged mode of ARM.

Interrupt Controller

AM1808 uses AINTC (ARM Interrupt Controller) as an interface between different peripherals of the system and the ARM9 core interrupt lines. System interrupts are generated by device peripherals. The FIQ and IRQ of ARM9 core are named as host interrupts. The AINTC maps system interrupts to host interrupts through channels. The AINTC supports up to 101 system interrupts each of which can be prioritized by mapping to one of the 32 channels. Channel 0 and Channel 1 are mapped to FIQ of ARM. Channels 2-31 are mapped to IRQ of ARM. The application has to decide which system interrupts to be mapped to what Channel number. A single system interrupt cannot be mapped to multiple Channels. However, more than one system interrupt can be mapped to a single channel. SitaraWare doesn’t support nesting of interrupts within host interrupts. The Interrupt System exports a set of APIs to enable/disable the ARM core interrupts and to configure and use the AINTC. The API functions are exported in /include/am1808/interrupt.h

Programming

The application shall decide whether a system interrupt shall be mapped to FIQ or IRQ. This can be done by mapping each system interrupts used, to corresponding channels. Interrupt Service Routines are part of the application. There should be a registered interrupt handler for all system interrupts enabled for processing.

• The following sequence can be used to set up the AINTC for a system interrupt
  • AINTC initialization shall be done before any interrupt processing is enabled, by calling IntAINTCInit(). This will make sure that all the fault system interrupt pending statuses are cleared before we enable any system interrupt.
  • Registered the interrupt handler for the system interrupt using IntRegister().
  • Set the channel number for the system interrupt using IntChannelSet().
  • Enable the IRQ/FIQ in ARM using IntMasterIrqEnable() / IntMasterFiqEnable() APIs.
  • Enable the global interrupt in AINTC using IntGlobalEnable(). If global interrupt is disabled in AINTC, AINTC will not signal any IRQ/FIQ to ARM core.
  • Enable individual host interrupt in AINTC using IntIRQEnable() / IntFIQEnable().
  • Enable the system interrupt using the API IntSystemEnable().

After the configuration and setting up of AINTC, the application shall enable the interrupt processing at the peripheral. Any system interrupt generated by a peripheral after this point will cause the execution of the corresponding ISR, which is registered for that system interrupt

Example configuration

The timerCounter (/examples/evmAM1808/timer/src/)application demonstrates the interrupt handling for Timer interrupts. The sample application uses Timer64P2 peripheral to demonstrate interrupt processing. The system interrupt number for Timer64P2 is 68. This is mapped to channel number 2. The AINTC will trigger IRQ for the Timer64P2 system interrupt. TimerIsr() is the Interrupt Service Routine registered for this system interrupt.

Serial Devices

AM1808 is integrated with the UART, I2C and SPI devices to cater to different serial communication requirements. The SitaraWare package contains the device abstraction layers (DAL) for these peripherals and example applications to demonstrate the same. More information on the DAL and examples can be found here

Audio

Audio is played in SitaraWare using the Multichannel Audio Serial Port (McASP). The McASP functions as a general-purpose audio serial port optimized for the needs of multichannel audio applications. The McASP can be used for time division multiplexed (TDM) stream, Inter-IC Sound (I2S) protocols, and inter component digital audio interface transmission (DIT). The McASP has separate transmit and receive sections that can operate synchronously or independently. The McASP can be configured for external or internal clock and frame sync signals. It has 16 serialisers each of which can be configured as transmitter or as a receiver. More on the McASP DAL and the associated applications can be found here

Ethernet

AM1808 has an integrated MDIO and ethernet MAC only peripheral, generally referred to as EMAC. External ethernet PHY can be interface in MII/GMII/RMII modes. SitaraWare package contains the device abstraction layers (DAL) for EMAC, MDIO and PHY devices. The EMAC capabilities are demonstrated by examples stacked with lwIP - a free BSD licensed light weight IP stack, suitable for no-OS systems. The details for EMAC DAL and the associated demonstration examples are provided here.

Graphics

AM1808 has a LCDC controller, which when configured in Raster mode, can interface to a TFT LCD/Display. This can be used to display static images and also with the help of a grphics libray can emulate dynamic data like updating messages, video emulation etc. More on the LCD and Graphics library and the associated applications can be found here

Universal Serial Bus (USB)

AM1808 has an integrated Mentor Graphics USB controller with an external PHY. The MSUB controller supports both host and device functionalities with OTG capability. Sitaraware USB package provides all the necessary software support for the MUSB controller which includes, Device Abstraction Layer (DAL), the USB Stack for CDC, HID and MSC Device class and the sample application. More about sitaraware USB can be found here

Flashing and booting

AM18XX SitaraWare package also contains flashwriter/flasher utility, which can be used to flash binary images to the on board SPI flash. At present only SPI flash is supported. It also contains a simple bootloader which can be used to bootstrap a board on power up, load an application from SPI flash and kick start the application, to provide an out-of-box experience. The bootloader, flashing procedure and the flash layout are explained here.

Timer

The 64 bit Timer Plus can be programmed in 64-bit mode, dual 32-bit unchained mode, or dual 32-bit chained mode. The timer can be configured for internal clock or external clock. The Timer modules can be used to generate periodic interrupts. Devices can use the watchdog timer mode to provide a recovery mechanism in the event of a fault condition. The Timer driver library exports a set of APIs to configure and use the 64 bit Timer Plus. The APIs are exported in /include/timer.h

Programming

The Timer Plus can be used as a 64 bit timer or dual 32 bit timers.

• To enable the Timer Plus to operate in 64 bit mode, the following sequence has to be followed.
  • Configure the timer for 64 bit mode using TimerConfigure(). The user can specify which clock is to be used for the timers.
  • Set the desired 64 bit period using TimerPeriodSet() in both the period registers. Period for Timer34 will act as the most significant 32 bits and the period for Timer12 will act as the least significant 32 bits of the 64 bit timer period.
  • Enable the timer using TimerEnable(). The timer will start counting in 64 bit mode. Note that we need to enable only Timer12 since it is configured for 64 bit mode.
  • If the Timer is enabled for continuous operation with period reload, set the reload registers with the reload period using TimerReloadSet().
• To enable the Timer Plus to operate in 32 bit chained mode, the following sequence has to be followed.
  • Configure the timer for 32 bit chained mode using TimerConfigure(). The user can also specify here which clocks to be used.
  • Set the desired Timer Period using TimerPeriodSet() in Timer12.
  • Set the desired Prescale value using TimerPeriodSet() in Timer34. Timer Period for Timer34 will act as the prescale period in 32 bit chained mode
  • Enable the timer using TimerEnable(). The timer will start counting. Note that we need to enable only Timer12 since it is configured for 32 bit chained mode.
  • If the Timer is enabled for continuous operation with period reload, set the reload registers with the reload period using TimerReloadSet().
• To enable the Timer Plus to operate in 32 bit unchained mode, the following steps need to be followed.
  • Configure the timer for 32 bit unchained mode using TimerConfigure(). The user can also specify here which clocks to be used for each timers. Both timers acts independently in this mode
  • Timer12 can be configured and enabled in the following sequence.
    • Set the desired Timer Period using TimerPeriodSet() in Timer12.
    • Set the compare values using TimerCompareSet(). 8 compare values can be set using this API.
    • Enable the Timer12 using TimerEnable(). The timer will start counting.
    • If the Timer is enabled for continuous operation with period reload, set the reload registers with the reload period using TimerReloadSet().
  • Timer34 can be configured and enabled in the following sequence.
    • Set the desired Timer Period using TimerPeriodSet() in Timer34.
    • Set the 4-bit prescalar value using TimerPreScalarCount34Set().
    • Enable the Timer34 using TimerEnable(). The timer will start counting.
    • If the Timer is enabled for continuous operation with period reload, set the reload registers with the reload period using TimerReloadSet().
• The Timer Plus can be configured as a Watchdog. To use the timer as WDT, following steps need to be taken.
  • Configure the timer to operate in 64 bit Watchdog mode using TimerConfigure().
  • Set the desired 64 bit period using TimerPeriodSet() in both the period registers. Period for Timer34 will act as the most significant 32 bits and the period for Timer12 will act as the least significant 32 bits of the 64 bit WDT period.
  • Activate the Watchdog Timer using TimerWatchdogActivate(). The WDT starts functioning at this point. To avoid a reset, TimerWathdogReactivate() shall be called before the WDT expires.

The timer can be enabled for event capture using TimerCaptureConfigure(). The user can select the even capture edge (rising edge/ falling edge/ both edges). The captured values can be read using TimerCaptureGet(); The timer interrupts can be enabled/disabled using TimerIntEnable()/TimerIntDisable() APIs.

Executing the example application

The example application needs that the serial port on the EVM is connected to the host serial port via a NULL modem cable. A serial terminal application (like teratem/hyperterminal/minicom) is runnning on the host. The host serial port is configured at 115200 baud, no parity, 1 stop bit and no flow control.

• Modules used in this example
  • Timer
  • UART
  • Interrupt

• The example application timerCounter demonstrates the use of timer as a countdown timer operating in 64 bit mode, counting down from 9 to 0. When the example application is executed, a string "Tencounter:". After this it starts to count down from 9 to 0 with approximately seconds granularity.
• The example application wdtReset demonstrates the use of timer in Watch Dog mode. When the example application is executed, a string "Program Reset! Input any key at least once in every 4 seconds to avoid a further reset." will appear on the screen. If no key is input, program will restart within few seconds.

GPIO

GPIO peripheral is used to interface with external devices and peripherals. These can act as input, to read digital signals from other parts of a circuit, or output, to control or signal to other devices.

AM1808 has one instance of GPIO peripheral. The 144 GPIO pins supported are divided into 9 banks with 16 pins in each bank.The pins can be programmed as input or output by using direction control registers. Output set or clear is achieved easily by writing into separate set and clear registers without modifying the states of the non-addressed pins.All the GPIO pins can be programmed to generate interrupts to the ARM core with configurable edge detection. All the GPIO pins can be programmed to generate events to the EDMA.

The APIs are exported in /include/gpio.h

Programming

General programming guidelines for GPIO are given below.

• Invoke GPIODirModeSet() to configure the direction of a GPIO pin as input or output. By default, all the GPIO pins are input pins.
• Invoke GPIOBankIntEnable() to enable interrupt generation for pins of a particular bank. Give the bank number as an argument.
• Use GPIOIntTypeSet() to configure the type of trigger level on which an interrupt is to be generated. Four possible trigger level types are
  • Rising Edge trigger
  • Falling Edge trigger
  • Both edge trigger
  • No edge trigger (no interrupts).
• Invoke GPIOPinIntClear()can be used to clear the interrupt status of the pin which generated the interrupt. Invoking GPIOPinIntStatus() will return the interrupt status on the specified pin.
• Write a pin with a given value using GPIOPinWrite() API. To write to multiple pins in the same bank at a time, GPIOBankPinsWrite() shall be used.

Executing the example application

The example application needs that the serial port on the EVM is connected to the host serial port via a NULL modem cable. A serial terminal application (likeTeraTem/Hyperterminal/ minicom) is runnning on the host. The host serial port is configured at 115200 baud, no parity, 1 stop bit and no flow control.

• Modules used in this example
  • GPIO
  • UART
  • Interrupt

• The program uses pin 0 of Bank 4 (written as GP4[0]) to generate interrupts whenever a MMC/SD card is inserted or removed. Observe the messages “MMC/SD card inserted” and “MMC/SD card is removed” on the serial terminal console whenever the MMC/SD card is inserted and removed.

RTC

The RTC provides a time reference to an application running on the device. The current date and time is tracked in a set of counter registers that update once per second. The time can be represented in 12-hour or 24-hour mode. The calendar and time registers are buffered during reads and writes so that updates do not interfere with the accuracy of the time and date. Alarms are available to interrupt the CPU at a particular time, or at periodic time intervals, such as once per minute or once per day. In addition, the RTC can interrupt the CPU every time the calendar and time registers are updated, or at programmable periodic intervals.

Programming

RTC can be programmed in the following manner:

• Out of reset, RTC registers are write-protected. To disable this write-protection and to program the RTC registers, specific key values have to be programmed to the KICK registers(KICK0 and KICK1 registers). Use the API RTCWriteProtectDisable() to do this.
• Invoke the API RTCEnable() to perform a software reset of the RTC registers, enable the RTC and to enable the leakage isolation circuitry. Setting the SPLITPOWER bit in CTRL register enables the leakage isolation circuitry.
• Use RTCTimeSet() to set the specified time in the relevant RTC registers. The time is passed as a parameter to this function. This function provides for setting the second, minute, hour and the meridiem (AM or PM) features in the relevant registers. Otherwise, there are APIs to set the above features individually.
• Invoke the API RTCRun() immediately after invoking RTCTimeSet() API to start ticking the clock.
• Use RTCCalendarSet() to set the specified calendar information in the relevant RTC registers. The calendar information is passed as a parameter to this function. This function sets the day of the month, month, year and day of the week features in the relevant registers. Otherwise, there are APIs to set the above features individually.
• Call RTCTimeGet() and RTCCalendarGet() to read the current time and calendar information respectively from the relevant registers.
• The user can also enable interrupts to be generated when specific events occur. Use RTCIntTimerEnable() API to enable periodic generation of interrupts. The period between two periodic interrupts could be a second, a minute, an hour or a day.
• RTC peripheral can also generate interrupts on attaining a certain time and calendar reading. Otherwise called as alarm interrupts, this feature is enabled using the API RTCIntAlarmEnable(). The alarm time is written to the alarm registers of the RTC.

Executing the example application

Connect the UART port onboard to the serial communication port on the host PC through a NULL modem cable. Run a serial commuication application (Tera Term/HyperTerminal/minicom) on the host. The host serial port is configured at 115200 baud, no parity, 1 stop bit and no flow control.

• Modules used in this example
  • RTC
  • UART
  • Interrupt

• On running the application, the user sees a request on the terminal to enter time and calendar information. On entering the information, the application does the tasks specified above. The time and calendar information currently held by the RTC regsiters are displayed on the terminal.

Enhanced High resolution PWM

The enhanced high resolution PWM (EHRPWM) in AM1808 is capable of generating complex pulse width waveforms with minimal CPU overhead. It is highly programmable and very flexible. Cross coupling or sharing of resources has been avoided; instead, the ePWM is built up from smaller single channel modules with separate resources and that can operate together as required to form a system. This modular approach results in an orthogonal architecture and provides a more transparent view of the peripheral structure, helping users to understand its operation quickly. Each ehrpwm module has two outputs EPWMxA and EPWMxB with high resolution capability on EHRPWMxA alone. In AM1808 there are two ehrpwm modules which can be comfigured independently.

Each ePWM module supports the following features:

• Dedicated 16-bit time-base counter with period and frequency control
• Two PWM outputs (EPWMxA and EPWMxB) that can be used in the following configurations::
  • Two independent PWM outputs with single-edge operation
  • Two independent PWM outputs with dual-edge symmetric operation
  • One independent PWM output with dual-edge asymmetric operation
• Asynchronous override control of PWM signals through software.
• Programmable phase-control support for lag or lead operation relative to other ePWM modules.
• Hardware-locked (synchronized) phase relationship on a cycle-by-cycle basis.
• Dead-band generation with independent rising and falling edge delay control.
• Programmable trip zone allocation of both cycle-by-cycle trip and one-shot trip on fault conditions.
• A trip condition can force either high, low, or high-impedance state logic levels at PWM outputs.
• Programmable event prescaling minimizes CPU overhead on interrupts.
• PWM chopping by high-frequency carrier signal, useful for pulse transformer gate drives

The EHRPWM driver library exports a set of APIs to configure the PWM module. The APIs are exported in /include/ehrpwm.h

Programming

To configure the EHRPWM, the following sequence can be used.

• EHRPWM needs to be first brought out of local reset by enabling the module inthe Power Sleep Controller by using PSCModuleControl().
• Pin multiplexing registers to enable EHRPWM pin and a standard configuration is provided as part of the function EHRPWMPinMuxSetup() in platform directory.
• Enable the AINTC to receive EHRPWM interrupts by using the AINTC API's given under /include/am1808/interrupt.h
• The EHRPWM has many sub-modules, which have to be configured,
  • Timebase
    • Scale the time-base clock (TBCLK) relative to the system clock (SYSCLKOUT) by using the API EHRPWMTimebaseClkConfig()
    • Configure the PWM time-base counter (TBCNT) frequency or period and set the mode for the time-base counter by using the API EHRPWMPWMOpFreqSet()
    • Configure the time-base phase relative to another ePWM module, synchronize the time-base counter between modules and configure the direction (up or down) of the time-base counter after a synchronization event by using the API EHRPWMTTimebaseSyncEnable()
    • Configure how the time-base counter will behave when the device is halted by an emulator by using the API EHRPWMTEmulationModeSet()
    • Specify the source for the synchronization output of the ePWM module by using the API EHRPWMTSyncOutModeSet()
  • Counter-Compare
    • Specify the PWM duty cycle for output EPWMxA and/or output EPWMxB and the time at which switching events occur by using the API's EHRPWMTLoadCMPA() & EHRPWMTLoadCMPB()
  • Action-qualifier
    • Specify the type of action taken when a time-base or counter-compare submodule event occurs by using the API EHRPWMTConfigureAQActionOnA() & EHRPWMTConfigureAQActionOnB()
  • Dead-band
    • Configure the output raising by using the API EHRPWMDBConfigureRED()
    • Configure the falling edge delay by using the API EHRPWMDBConfigureFED()
    • The source & polarity also can be configured
  • PWM-chopper
    • Configure the chopping (carrier) frequency by using the API EHRPWMConfigureChopperFreq()
    • Configure the carrier frequency by using the API EHRPWMConfigureChopperDuty()
    • The one shop pulse width can be configure by using the API EHRPWMConfigureChopperOSPW()
  • HR
    • The High resolution can be configure using the API's EHRPWMTLoadTBPHSHR() and EHRPWMTLoadCMPAHR()

Executing the Sample Application

To demonstrate the capabilities of EHRPWM, pin EHRPWM1A is used. This pin is extended in freon EVM on LCD connector which is J15 (pin 36). The user has to probe this pin to see the waveform generated by the application example. Since EHRPWM module has many sub-modules, to demonstrate the capabilities of each clearly macros are used.

The macros has to be enabled one at a time to see the behaviour of each sub-module. These macros are available in the application source file examples\evmAM1808\ehrpwm\src\ehrpwmWaveForm.c.The TB CNT is set to 255.

#define BASIC_WF 1 // generate basic waveform
#define DB_GEN 1 // Generate dead band on the raising edge of basic waveform (above)
#define CHP_EN 1 // The basic waveform is chopped with carrier frequency
#define TRIP_EN 1 // The trip is simulated with software cyclically after a delay and the action is to toggle the output
#define SYNC_EN 1 // The sync input is also simulated in software when the COUNT==CMPB, the COUNT is set to 250 after sync
#define HR_EN 1 // The HR capability can be observed with oscilloscope having higher resolution in terms on nano-sec or pico-sec

Enable & disable "EHRPWMHRDisable(SOC_EHRPWM_1_REGS);" in ehrpwmWaveForm.c to see the HR capability.

Character LCD (LIDD)

The LCD controller on AM1808 can be configured in LIDD mode of operation. In this mode it can be used to interface Character LCD displays for text ASCII character/message displays. A 24X2 character LCD is provided on the User Interface Board (UI Board). The example application is demonstrated this display. The example application works in polling mode and does not use interrupts.

   NOTE Since LIDD mode and Raster mode of operation cannot be configured at the same time in the LCD controller, only one kind of a display can be used at a time.

Programming

• Setup the pin multiplexing for LCD mode of operation. This is done via 'LIDDPinMuxSetup()'
• The Character LCD interfacing lines are muxed on the EVM with various other peripherals like the VPIF, ADC/DAC, Ethernet etc. Thus the on board mux TCA6416 needs to be configured to route the LCD lines to the character LCD. This, since is platform (EVM) dependent is abstracted in function LIDDDisplayEnable() in the platform library
• The clock for the LIDD needs to be configured so as to generate a proper 'ENABLE' signal for the character LCD. This is done via 'LIDDClkConfig()'
• The mode for the LIDD is selected to driver the character LCD. This is done via 'LIDDModeSet()'
• The strobe timing parameters as required by the character LCD are configured via 'LIDDCSTimingConfig()'
• The character LCD needs to initialized with a series of command sequence (provided inthe character LCD manual). This command sequence series can be given using 'DisplayControlValueWrite()'
• Once the character LCD is initialized, messages can be displayed using 'LIDDDataWrite()'

Example application

Before executing the ensure that the User interface board, on which the character LCD is present, is plugged on to the main board.

Once the character LCD display example is loaded on the board and executed, a welcome string starts to scroll on the LCD.

Cache MMU Example application

ARM9 uses read-allocate cache lines, on cache miss, policy. A write of new data to memory does not update the contents of cache memory unless, a cache line was allocated on a previous read from main memory. Hence in cache example application, once cache is enabled, the buffer that needs to be cached is read so that, the cache line is allocated for the buffer. After this buffer is populated with data, the data is updated inside the cache and not to main memory, since cache is using writeback policy.

When cache example application is compiled two ELF executable(.out) are generated. They are,

1. uartEdma_Cache.out. This executable demonstrates the effects of not cleaning the cache before a third party (like the EDMA) tries to access the buffer from the main memory.
2. uartEdma_CacheFlush.out. This executable demonstrates the cleaning of the cache before a third party (like the EDMA) tries to access the buffer from the main memory.

Execution sequence of uartEdma_Cache.out

1. Lower case alphabets, a..z, is populated to buffer in the Main Memory (DDR). Note that the cache is not yet enabled

2. Cache is enabled with writeback policy for entire Main Memory (DDR).

3. EDMA is programmed to transfer data from buffer to serial console.

4. Lower case alphabets, a..z, will be printed on the serial console. This is because in step 1, the contents were written to main memory since cache was not enabled

5. Buffer is read to some dummy variable so that cache line gets allocated to the buffer. This is necessary since the cache lines are read-allocate

6. Upper case alphabets, A..Z is populated to buffer. Since buffer is cached with writeback policy, the data populated(A..Z) is updated only to cache and not to Main Memory

7. EDMA is programmed to transfer data from buffer to serial console.

8. a..z will be printed on the serial console. This is because EDMA always transfer data from main memory.

Execution sequence of uartEdma_CacheFlush.out

1. Lower case alphabets, a..z, is populated to buffer in the Main Memory (DDR). Note that the cache is not yet enabled

2. Cache is enabled with writeback policy for entire Main Memory (DDR).

3. EDMA is programmed to transfer data from buffer to serial console.

4. Lower case alphabets, a..z, will be printed on the serial console. This is because in step 1, the contents were written to main memory since cache was not enabled

5. Buffer is read to some dummy variable so that cache line gets allocated to the buffer.

6. Upper case alphabets, A..Z is populated to buffer. Since buffer is cached with writeback policy, the data populated(A..Z) is updated only to cache and not to Main Memory

7. Cache is cleaned. When cache is cleaned the data that has got cached(A..Z) is written back to main memory. Now both cache and main memory contains same data.

8. EDMA is programmed to transfer data from buffer to serial console.

9. A..Z will be printed on the serial console.

Out-Of-Box Demo Application

Introduction

The out-of-box demo application demonstrates the capabilities of the device abstraction layer of SitaraWare. The application executable can be found in /examples/evmAM1808/demo/gcc/. The demo application can be navigated through Touchscreen and/or Ethernet.
TMS470 Tool chain does not support packed attributes. This leads to issues when ethernet applications, built with TMS470 tool chain, are executed on the target. Hence, please do not use/connect ethernet in the demo. This issue is documented in the Known issues section of the release notes

Modules Used

The modules used in the out-of-box demo application are listed below.

• Raster
• Touch detection
• Ethernet
• McASP
• UART
• SPI
• I2C
• Timer
• GPIO
• RTC
• Interrupt

Design overview

The out-of-box demo application combines functionality of multiple peripherals to demonstrate SitaraWare capabilities to be used for various use case scenarios. The application is designed to be driven by both Touch and Ethernet. The programming sequence is given below.

• Enable PSC and pin multiplexing for the peripherals used.
• Initialize the AINTC, register all the interrupt handlers, enable the interrupts at AINTC
• Initialize the required peripherals and enable peripheral level interrupts.
• Display the banner image
• Start playing the audio tone. This tone will be looped forever.
• Detect a touch on the LCD or a click on the embedded page accessed via ethernet.
  • If a touch is detected, validate the coordinates. If the coordinates are verified, display the proper image and demonstrate the peripheral.
  • If a click is detected, display the proper image and demonstrate the peripheral.

The application maintains a list of contexts which include

• The image to display
• Number of Icons in the image
• Specification for each Icon in the image. The specification includes
  • Valid coordinates of an Icon
  • The action to be taken when the valid coordinates are touched.

If a touch is detected in the current context, the touch coordinates are validated based on the specification of each Icon in the image, and the corresponding action will be taken.

When a button on the embedded page is clicked, the click information will be updated by the CGI handler which is registered during the initialization of the http server. Based on this information, the current context will be updated to display the proper image and demonstrate the peripheral.

Executing The Application

• Setup Requirement
  • The serial port on the EVM to be connected to the host serial port via a NULL modem cable.
  • A serial terminal application (like Tera Term / HyperTerminal / minicom) should be running on the host.
  • The host serial port is configured at 115200 baud, no parity, 1 stop bit and no flow control.
  • GLCD(Raster) module to be plugged into the EVM
  • Ethernet port on board connected to a port on the LAN.

The Demo Application can be driven via Touch and/or Ethernet.

Follow the proper code flashing procedure to flash the code onto the board. On booting the code, a banner will be displayed on the LCD, followed by an introductory slide.

If the demo needs to be driven via Ethernet, connect the Ethernet port on board to the LAN/host Ethernet port via an Ethernet cable. If connected to the host Ethernet port, make sure that a DHCP server application is running on the host. On proceeding, the dynamic IP address assigned to the EVM will be displayed on the LCD and on the UART console. The embedded web page can be accessed anytime using http://<ip address>/index.html via a web browser on the host. Ensure that proxy server is not used for the dynamic IP address assigned for the board.

The link IO Control Demo in the embedded home page has buttons to demonstrate Timer, I2C, GPIO and RTC. Clicking on any of these icons will demonstrate the peripheral. For example, if the Icon RTC is clicked, the RTC image will be displayed on the LCD. If the time and date are to be set in RTC, touch on the 'Set Time and Date though UART console' Icon and enter the time and date information through UART console. The application will start displaying the time and date on the UART console.

The user can anytime touch on the next/continue icon to proceed to the next slide. The Demo Application ends with a slide displaying the message 'THANK YOU'. The application can be restarted by touching on the 'Restart' Icon.

API Reference Guide

Driver library API Reference Guide is attached here. The API reference guide is in zip format. So please unzip and save the .chm document to local disk to view its contents.

Migrating from StellarisWare

Please refer to the Migration Notes for comparison of  device abstraction layers of  StellarisWare and SitaraWare.

Memory Usage Statistics

This section provides the code and data section for every device abstraction layer library object and the executables, generated using Code Sourcery GCC.

• Device Abstraction Layer

DAL object	text size (bytes)	data size (bytes)
edma	2576	0
ehrpwm	1944	0
emac	708	0
gpio	780	0
i2c	524	0
lan8710	932	0
mcasp	1396	0
mdio	228	0
psc	216	0
raster	640	0
rtc	1920	0
spi	620	0
timer	1124	0
uart	632	0
usb	8192	0

• Executables

Binary	text size (kB)	data size (kB)	Notes
uartEcho	2.09	0.49	Data length attributed to global variables, interrupt table and transmit buffer
demo	77.49	4221.70	Data length attributed to global variables, interrupt table, audio raw tone and image data
ehrpwmWaveForm	2.89	0.45	Data length attributed to global variables and interrupt table
echoApp	41.64	62.76	Data length attributed to global variables, ethernet state variables and lwip netif structures
enetLwip	43.41	65.03	Data length attributed to global variables, ethernet state variables and lwip netif structures
gpioCardDetect	2.64	0.58	Data length attributed to global variables and interrupt table
grlib_demo	30.45	615.37	Data length attributed to global variables, interrupt table and image data
game	27.52	978.44	Data length attributed to global variables, interrupt table and audio raw tone
i2cLedBlink	1.20	0.48	Data length attributed to global variables, interrupt table, transmit and receive data buffers
i2cEdma	3.70	0.48	Data length attributed to global variables, interrupt table, transmit and receive data buffers
mcaspPlayBk	7.38	48.64	Data length attributed to global variables, interrupt table, receive and transmit data buffers
rasterDisplay	3.03	255.48	Data length attributed to global variables, interrupt table and image data
rtcClock	4.58	0.89	Data length attributed to global variables and interrupt table
spiFlash	3.65	1.28	Data length attributed to global variables, interrupt table, transmit and receive data buffers
spiEdma	7.11	1.11	Data length attributed to global variables, interrupt table, transmit and receive data buffers
timerCounter	2.66	0.49	Data length attributed to global variables and interrupt table
uartEcho	2.14	0.50	Data length attributed to global variables, interrupt table, transmit and receive data buffers
uartEcho(edma)	4.69	0.64	Data length attributed to global variables, interrupt table, transmit and receive data buffers
usb_dev_serial	25.90	268.6	Data length attributed to global variables, interrupt table and USB library objects. The larger data size is attributed the graphics related buffers used in the application to give good UI experience for the users. The graphics and hence these buffers can be cut off to get thin data size.
usb_dev_mouse	25.70	261.38	Data length attributed to global variables, interrupt table and USB library objects. The larger data size is attributed the graphics related buffers used in the application to give good UI experience (track pad area/click buttons on touch screen etc) for the users. The graphics and hence these buffers can be cut off to get thin data size.
usb_dev_msc	18.14	16617.97	Data length attributed to global variables, interrupt table and USB library objects. The larger data size is attributed the 16MB of RAM disk and large amount of DMA buffers used in the DMA driver. The driver buffers and RAM disk size can be reduced to get a thin data size.
wdtReset	3.86	0.15	Data length attributed to global variables and interrupt table
bootloader (spi)	4.05	0.16	Data length attributed to global variables

Technical Support and Product Updates

For further information or to report any problems, contact sitaraware_support@list.ti.com