SitaraWare Audio

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SitaraWare Audio

Audio in SitaraWare is played via the Multichannel Audio Serial Port (McASP). The McASP functions as a general-purpose audio serial port optimized for the needs of multichannel audio applications. The McASP can be used for time division multiplexed (TDM) stream, Inter-IC Sound (I2S) protocols, and inter component digital audio interface transmission (DIT). The McASP has separate transmit and receive sections that can operate synchronously or independently. The McASP can be configured for external or internal clock and frame sync signals. It has 16 serialisers each of which can be configured as transmitter or as a receiver.

Programming

The McASP exchanges audio data with a codec which is interfaced to McASP through data, clock and frame sync lines. The codec shall be configured separately through the control bus, via which it is connected to the SOC like I2C or SPI. Prior to using the McASP for audio applications, the user has to decide the following things

• Pin settings: The McASP pins shall be configured to operate in McASP mode. Also, if external clock/frame sync signals are to be used, respective pins shall be configured as input pins. All the serializers which are transmitters shall be configured as output pins and all serializers which are receivers shall be configured as input pins.
• The sampling rate to be used for transmission and reception: The clock and frame sync sources for the transmit and receive sections shall be configured based on this.
• Data format for transmission and reception: This shall be determined based on the word size, slot size and the protocol to be supported.
• Data transfer mode: Based on the application, the McASP shall be configured for the mode of data transfer. Data can be sent/received out of McASP using DMA, or interrupts or polling the status bits.

The McASP can be initialized for separate transmit/receive sections. General programming guidelines for McASP are given below.

• Configure the McASP pins using McASPPinMuxSetup() and enable the PSC for McASP.
• Configure the audio codec which is connected to the McASP based on the clock/frame sync and data format settings via the control bus.
• Reset the McASP Transmit/Receive sections using McASPTxReset()/ McASPRxReset()
• If DMA mode of operation is intended, enable the Write FIFO using McASPWriteFifoEnable() for transmission and enable the Read FIFO using McASPReadFifoEnable() for reception.
• Set the data format using McASPTxFmtMaskSet()/McASPRxFmtMaskSet() APIs and McASPTxFmtSet()/McASPRxFmtSet() APIs separately for transmit and receive sections . If I2S mode is to be used, McASPTxFmtI2SSet()/McASPRxFmtI2SSet() can be used instead.
• Configure the frame sync signal for transmit/receive sections using the API McASPTxFrameSyncCfg()/McASPRxFrameSyncCfg(). The frame sync source can be selected to be internal or external.
• Configure the bit clock for the transmit/receive sections using McASPTxClkCfg()/McASPRxClkCfg(). The clock source can be internal, external or mixed.
• Select the polarity of the bit clock for transmission using McASPTxClkPolaritySet(). If the external receiver samples the data during rising edge, the McASP transmitter shall shift the data out during the falling edge of the clock and vice versa. The polarity of bit clock for reception shall be selected using McASPRxClkPolaritySet(). If the external transmitter shifts the data out during the rising edge of the clock, the McASP receiver shall sample the data during the falling edge of the clock and vice versa.
• Select the time slots during which transmission/reception shall happen using the API McASPTxTimeSlotSet()/McASPRxTimeSlotSet()
• Set the desired serializers as transmitters/receivers using McASPSerializerTxSet()/McASPSerializerRxSet().
• Configure the McASP pins to be used for McASP using McASPPinMcASPSet().
• Configure the pin directions of the output and input pins using McASPPinDirOutputSet()/McASPPinDirInputSet().
• Start the transmitter/receiver clock by invoking the API McASPTxClkStart()/McASPRxClkStart()
• If DMA mode of transfer is to be used, enable the DMA transfer at this step. If interrupt mode of transfer is to be used, enable the interrupts here using McASPTxIntEnable()/McASPRxIntEnable() APIs.
• Activate the transmit/receive serializers by invoking McASPTxSerActivate()/McASPRxSerActivate()
• If CPU polling mode/interrupt mode is used write the TX buffer at this step using the API McASPTxBufWrite().
• Enable the transmit/receive state machine and frame sync by invoking McASPTxEnable()/McASPRxEnable().
• If CPU polling method/interrupt method is used, before putting data into the transmit buffer and before reading data from the receive buffer, the data ready bit shall be polled using McASPTxStatusGet()/McASPRxStatusGet() APIs.

Example application

The McASP example demonstrates audio data transmission and reception in I2S mode using DMA. The audio input on the LINE IN is looped back to the audio ouput on LINE OUT of the EVM. A 3.5mm audio jack which takes analog audio signals shall be plugged into the LINE IN of the EVM. Also, a 3.5mm audio jack which is connected to a headphone or speakers shall be plugged into the LINE OUT of the EVM.

• Modules used in this example
  • McASP
  • EDMA
  • I2C
  • Interrupt

DMA Buffer handling for Ping-Pong Operation

The Example Application uses EDMA for audio data transmission/reception. The audio data buffers associated with EDMA transmission are

• 4 Transmit buffers: TX buffer-0, TX buffer-1, TX buffer-2 and a loop buffer.
• 3 Receive buffers: RX buffer-0, RX buffer-1 and RX buffer-2.

The EDMA paRAM sets are programmed to receive data in RX buffers and transmit data from TX buffers. When an RX buffer gets filled, the contents will be copied to TX buffer, then it will be transmitted. If no data is received, the EDMA paRAM sets for transmission are programmed to transmit from the loop buffer, which is a NULL buffer containing no valid audio data.

1. Initialization Of EDMA Parameters

Before the McASP transmit/receive state machines are brought out of reset, the EDMA paRAM sets shall be initialized. The main paRAM set for RX is paRAM set 0 and the main paRAM set for TX is paRAM set 1. After the main paRAM set expires, data transmission/reception will continue with the linked paRAM sets. The linked paRAM sets will not expire its own since the EDMA will copy the linked paRAM set to the main paRAM set and use it for data transfer. Hence, there is no need to update all the fields in a linked paRAM set after the associated transfer completion.

The RX paRAM set 0 will be initialized to receive the first audio sample in the RX buffer-0. The transfer completion interrupt will not be enabled for paRAM set 0. paRAM set 0 will be linked to linked paRAM set 40. The paRAM set 40 will resume receiving data in RX Buffer 0. The paRAM set 40 will be linked to paRAM set 41 which will be initialized to receive data in RX Buffer 1. The paRAM set 41 will be again linked back to paRAM set 40. Hence the reception paRAM set will be initialized as 0-->40-->41-->40. This linking will not change throughout the application execution.

All the TX paRAM sets will be initialized to transmit from the loop buffer. The transfer completion interrupt will not be enabled for paRAM set 1. paRAM set 1 will be linked to linked paRAM set 42. paRAM set 42 and 43 will be linked to itself. Hence transmission paRAM set linking will be initialized as 1-->42-->42, 43->43.

2.Releasing the McASP TX and RX state machines from reset Once McASP TX and RX state machines are released from reset, the McASP triggers EDMA events for transmission and reception. The first audio sample will be received in RX buffer-0 via main paRAM set 0. Since it is linked to paRAM set 40, after receiving the first sample, EDMA will resume receiving data in RX buffer-0 via paRAM set 40. Similarly, the main paRAM set-1 will enable transmssion from the loop buffer. when the main paRAM set expires, paRAM set 42 will continuously transmit data from the loop buffer.

Once the EDMA reception is complete in RX Buffer-0, copy the RX Buffer-0 to TX Buffer-0 and update the link paRAM set 42 to send data from TX Buffer-0. Also after the paRAM set 42 will be linked to paRAM set 43. While the TX buffer-0 is being transmitted, the EDMA will be receiving data in RX buffer-1 via paRAM set 41. Hence the paRAM set 40 shall be updated to receive data in RX buffer-2.

After the RX Buffer-1 is filled, it will be copied to TX Buffer-1 and the paRAM set 43 will be updated to send from TX Buffer-1. After the EDMA transmission from TX Buffer-0 completes, the EDMA will immediately start transmitting from TX Buffer-1 since the paRAM set 42 is linked to paRAM set 43. During this time, the EDMA will be receiving data in RX Buffer-2.

After the RX Buffer-2 is filled, it will be copied to TX Buffer-2 and the paRAM set 42 will be updated to send from TX Buffer-2. After the EDMA transmission from TX Buffer-1 completes, the EDMA will immediately start transmitting from TX Buffer-2 since the paRAM set 43 is linked to paRAM set 42. During this time, the EDMA will be receiving data in RX Buffer-0.

After the RX Buffer-0 is filled, it will be copied to TX Buffer-0 and the paRAM set 43 will be updated to send from TX Buffer-0. After the EDMA transmission from TX Buffer-2 completes, the EDMA will immediately start transmitting from TX Buffer-0 since the paRAM set 42 is linked to paRAM set 43. During this time, the EDMA will be receiving data in RX Buffer-1.

The EDMA data transfer resumes in the same sequence as explained in the above steps since the paRAM sets are programmed appropriately.

Technical Support and Product Updates

For further information or to report any problems, contact sitaraware_support@list.ti.com