C6474

Important Note:

This wiki is in maintenance mode and the information on this wiki may not be current. For questions regarding this device architecture, post questions on C64x Multi-core E2E forum

TMS320C6474 Wiki Page Content

What is the C6474?

• A high performance multicore DSP, integrating three 1 GHz or 1.2 GHz cores, a host of high speed peripherals and internal memory on a compact 23mm x 23mm chip for DSP farm applications.
• Compared to three C6455 DSPs connected via SRIO, the C6474 consumers 1/3 less power, costs 2/3 less in terms of DSP related costs, and uses 2/3 less DSP footprint on the board.

What are the key features for C6474?

C6474 Block Diagram

• High-performance multicore DSP (C6474)
  • 1.0-GHz, 1.2-GHz clock rate
• 3 TMS320C64x+™ DSP Cores
• TMS320C64x+ Megamodule L1/L2 Memory Architecture
  • 32 K-Byte L1P Program Cache [Direct Mapped]
  • 32 K-Byte L1D Data Cache [2-Way Set-Associative]
  • 3072 K-Byte Total L2 Unified Mapped RAM/Cache
• Enhanced VCP2
  • Supports Over 694 7.95-Kbps AMR
• Enhanced Turbo Decoder Coprocessor (TCP2)
  • Supports up to Eight 2-Mbps 3 GPP (6 Iterations)
• Frame Synchronization Interface (FSYNC)
  • Time Alignment Between Internal Subsystems, External Devices/System
• 16-/32-Bit DDR2-667 Memory Controller
• EDMA3 Controller (64 Independent Channels)
• Antenna Interface (AIF)
  • 6 Configurable Links (Full Duplex)
  • OBSAI Link Rates: 768-Mbps, 1.536-, 3.072-Gbps
  • CPRI Link Rates: 614.4-Mbps, 1.2288-, 2.4576-Gbps
• Two 1x Serial RapidIO® Links, v1.2 Compliant
  • 1.25-, 2.5-, 3.125-Gbps Link Rates
  • Message Passing and DirectIO Support
  • Error Management Extensions and Congestion Control
• One 1.8-V Inter-Integrated Circuit (I2C) Bus
• Two 1.8-V McBSPs
• 1000 Mbps Ethernet MAC (EMAC)
  • Supports SGMII, v1.8 Compliant
  • 8 Independent Transmit (TX) and 8 Independent Receive (RX) Channels
• Six 64-Bit General-Purpose Timers
• 16 General-Purpose I/O (GPIO) Pins
• Internal Semaphore Module
  • Software Method to Control Access to Shared Resources
  • 32 General Purpose Semaphore Resources
• 561-Pin Ball Grid Array (BGA) Packages, 0.8-mm Ball Pitch
• Commercial temperature 0°C to 100°C for 1.0-GHz; 0°C to 95°C for 1.2-GHz

When should I consider C6474?

• If you are using multiple single core DSPs per board (ie. "DSP farm), the C6474 is a viable migration option.
• If you are currently using multiple discrete C641x or C645x processors.
• If your application must transfer of large amounts of data on/off chip.
• If you are already designing with multicore devices, but looking for a significantly better power profile
• If you are using FPGAs, but seeking a lower cost, software upgradeable option
• If you are designing the following targeted applications:
  • Mission critical applications such as military, aerospace, avionics, public safety, satellite and utilities systems
  • High performance video applications
  • High performance imaging applications (including medical)
  • Emerging broadband and communications applications
  • Test & Measurement solutions
  • Advanced networking equipments
  • Oil exploration and modeling equipments
  • Training and simulation applications

What applications is the C6474 targeted for?

• Applications using multiple single core DSPs per board (ie. DSP farm)
• Applications that require transfer of large amounts of data on/off chip
• Suitable applications include:
  • Mission critical applications such as military, aerospace, avionics, public safety, satellite and utilities systems
  • High performance video applications
  • High performance imaging applications
  • Emerging broadband and communications applications
  • Test and measurement applications
  • Advanced networking equipments
  • Oil exploration and modeling equipments
  • Training and simulation applications

What is the advantage of using C6474 in some of the mentioned applications?

• C6474 delivers significant performance integration and high performance density, along with substantial efficiencies in power, cost and board space.
• For example, when compared to a farm of three C6455 (1 GHz) devices, one C6474 saves nearly $345 in DSP related costs – or a 2/3 reduction.
• The C6474 delivers the same raw DSP performance, but more than 2/3 less board space and 1/3 less power.
• A Few key applications enabled by the C6474, compared to the user of multiple single core DSPs per board. (Show slides 8 – 12 from the ppt):
  • Ultrasound (
  • High end imaging
  • Wireless test and measurement
  • Software defined radio (baseband)
  • WiMAX basestation

What peripherals are available for the C6474?

• 2x SRIO (1x links)
• 10/100/1000 Mbps Ethernet – SGMII
• Antenna interface – 6 links @ 3.125 Gbps each
• McBSP (TDM)

What power management solutions are available for the C6474

See the C6474 power management folder (http://focus.ti.com/analog/docs/refdesignovw.tsp?familyId=64&contentType=2&genContentId=51423)

The C6474 EVM

C6474 EVM Diagram

• C6474 EVM (http://focus.ti.com/docs/toolsw/folders/print/tmdxevm6474.html) is a software debug platform for high performance application development. It includes:
  • Two C6474 processors
  • High speed DSP interconnect enabled by EMAC, AIR and SRIO SERDES interfaces
  • S56 MB of 667 MHz DDR2 per C6474 processor
  • SGMII switch provides Gigabit Ethernet connection
  • McBSP, Timer, GPIO interfaces accessible via connector
  • Onboard JTAG emulation plus a XDS560T (Trace Pod) header
  • Board specific Code Composer Studio™ Integrated Development Environment
  • Simple set up
  • Includes design files such as Orcad and Gerber
  • Board Support library accelerates software development on the EVM
• CCSv5.1 Free CCS licenses for C64x EVMs [Activation Instruction - Step 2]

How do I Migrate from the C6455 to the C6474?

TMS320C6455 to TMS320C6474 Migration Guide

What DSP SW libraries are available for the C6474?

• See list of tools and software here (http://focus.ti.com/docs/prod/folders/print/tms320c6474.html#toolssoftware)

Related SW library information on Wiki

• Connecting Antenna Interface (AIF) With TDM Bridge Chip - IDT 80HFC001
• Using C6474 AIF for Inter-DSP Communication
• SRIO Direct IO library
• Boot Test Package
• SRIO Messaging Example please see: http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/439/p/92902/333573.aspx#333573
• SRIO Messaging Int Errata Code
• HelloWorld NDK2.2 Example for dual C6474EVM using MCSDK1.0
• Ethernet NIMU fix

C6474 Simulator (Supported only in CCSv4 and CCSv5)

This simulator is a multi-core 64x+ device simulator. We provide two vairant of the simulator as given below.

• C6474 Simulator (Asymmetric L2)
  • Has different L2 memory size for each core - 1.5 MB, 1MB & 512Kb respectively
• C6474 Simulator (Symmetric L2)
  • Has same L2 memory size for all core - 1MB each.

Component Modeled

Components modeled in C6474 Simulator

• 3 C64x+ core, cache system , RSA
• DMA, SCR, Timer, McBSP, TCP2, VCP2, AIF & Semaphore
• EMIFv3 & DDR memory (DDR2-667)

TI 3rd Parties

Hardware	Software
Spectrum Digital	TataElxsi
CommAgility	ENEA
IAF	VirtualLogix
Bitware	Electrobit

Additional Information, Training, and Support

Where do I go for more information?	C6474 product folder (http://focus.ti.com/docs/prod/folders/print/tms320c6474.html) C6474 EVM (http://focus.ti.com/docs/toolsw/folders/print/tmdxevm6474.html)
Where do I go for training?	C6474 online training workshop (http://e2e.ti.com/media/p/36682.aspx) TI Training website. See here (http://focus.ti.com/general/docs/traininghome.tsp Hands On Embedded Processor Training Wiki
Where do I go for support?	For further discussions and support go to TI\’s E2E Community (https://community.ti.com/) TMS320C6000™ High Performance DSPs (https://community.ti.com/forums/38.aspx) C6474 application notes (http://focus.ti.com/docs/prod/folders/print/tms320c6474.html\#applicationnotes)