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AM335x Industrial Automation EVM User Guide
- AM335x Industrial Design Kit Evaluation Module (TMDXEVM3359) Hardware User Guide
The content of this wiki is no longer maintained. The TMDXIDK3359 is "Obsolete" and no longer available. However the TMDSICE3359 is recommended for industrial communications and is less complex to use and is readily available at a lower cost via the TI eStore.
Contents
- 1 Introduction
- 2 System Description
- 3 Power System
- 4 Configuration/Setup
- 5 AM335x IDK EVM Functional Block Descriptions
- 5.1 Board Identity Memory
- 5.2 SDMMC0 Connector
- 5.3 10/100 Ethernet PRU Controlled
- 5.4 10/100 Ethernet
- 5.5 USB
- 5.6 RS-232 Connectors
- 5.7 CAN
- 5.8 ProfiBus
- 5.9 Industrial Serializer (SPI)
- 5.10 Industrial Serializer (I2C)
- 5.11 Piccolo DSP
- 5.12 Stellaris
- 5.13 Motor Control
- 5.14 RS-485 / EnDAT
- 5.15 EtherCAT LED's
- 5.16 ADC Inputs
- 5.17 NAND Flash Memory
- 5.18 SPI Flash Memory
- 6 Pin Use Description
- 7 Board Connectors
- 8 EVM Important Notices
- 9 ANNEX
Introduction[edit]
The TMDXIDK3359 is "Obsolete" and no longer available. However the TMDSICE3359 is recommended for industrial communications and is less complex to use and is readily available at a lower cost via the TI eStore.
This document describes the hardware architecture of the AM335x Industrial Development Kit (IDK) Evaluation Module (EVM) (Part # TMDXIDK3359) which is based on the Texas Instruments AM335x processor. This EVM is also commonly known as the AM335x IDK EVM.
Description[edit]
The AM335x IDK EVM is a standalone test, development, and evaluation module system that enables developers to write software and develop hardware around an AM335x processor subsystem, and it is focused on industrial automation and motor control type of applications. The main elements of the AM335x subsystem are already available on the base board of the EVM which gives developers the basic resources needed for most general purpose type projects that encompass the AM335x as the main processor. Furthermore, additional, industrial type peripherals are built into the daughterboard of the EVM such as memory, sensors, Profibus, DCAN, Ethernet PHY, etc. so that prospective industrial systems can be modeled quickly without significant additional hardware resources.
The following sections give more details regarding the EVM.
EVM System View[edit]
The System View of the AM335x IDK EVM consists of the baseboard and industrial automation/motor control daughterboard stacked together and connected with standard throughhole connectors. See the pictures below of the EVM.
Figure 1: AM335x IDK EVM
Figure 2: AM335x IDK Daughterboard View
Schematics/Design Files[edit]
- HW Documentation - Schematics, Design Files, and other related HW Documentation
System Description[edit]
System Board Diagram[edit]
The complete AM335x IDK EVM is partitioned across two different boards for modularity. The IDK EVM consists of the baseboard (processor and main power supply) and daughterboard (external peripherals).
Figure 3: AM335x IDK EVM System Board Diagram
Functional Block Diagram of AM335x IDK Baseboard[edit]
The functional block diagram of the AM335x IDK baseboards is as shown below:
Figure 4: AM335x IDK Baseboard Block Diagram
Functional Block Diagram of AM335x IDK Industrial Daughterboard[edit]
The functional block diagram of the AM335x IDK Industrial Daughterboard is as shown below:
Figure 5: AM335x IDK Industrial Daughterboard Block Diagram
Processor[edit]
The AM3359 processor is the central processor for this EVM. All the resources on the board surround the AM3359 processor to provide development capabilities for hardware and software. See the AM3359 datasheet and TRM for the details about the processor.
There are system configuration signals, SYSBOOT, that can be set on the EVM to define some startup parameters on the AM335x processor. See the Configuration/Setup section later for more details.
Clocks[edit]
The IDK EVM has several clocks to support the AM3359 processor. The main clock for the processor is derived from a 24MHz crystal. An on-board oscillator in the AM3359 generates the base clock and subsequent module clocks as needed within the AM3359 processor. A 32kHz clock for the RTC on the AM3359 is derived from a 32kHz crystal on the board.
Reset Signals[edit]
SYS_RESETn is a signal running to several peripherals and AM335x which performs a reset on those peripherals. SYS_WARMRESETn is asserted by a pushbutton on the base board and is used to force a reset of the AM335x. AM335x can also pulldown on the RESET_INOUTn signal to cause the SYS_RESETn line to go active.
Power System[edit]
This section describes how the power supply is implemented.
Power Source[edit]
Power Source[edit]
AM335x Baseboard uses an external AC to +5VDC (rated 2.5A min) power adapter. The switch near to the power cable is used for power ON/OFF. The main power is off when the power switch is in the position away from the power supply jack. The main power is on when the power switch is in the position closest to the power supply jack. The AM335x IDK Daughterboard has a power jack for +24VDC to power the motor drive and the industrial input/output devices. There are separate industrial screw down power supply jacks for +24VDC connections to enable using different voltage values to drive the motor than the industrial input/outputs. Nonetheless, the default setup when the IDK is shipped is to use a single +24VDC power supply into the DIN power jack. On earlier IDK versions, this DIN power jack is the same barrel size as the base board +5VDC power jack.
Be careful to plug the supplied +24VDC power supply only into the daughterboard!
Power Nets[edit]
The power nets used in the AM335x Baseboard schematics are listed in the below tables.
| Net | Description |
|---|---|
| V1_8DDR | Power supply for DDR2 SDRAM |
| GND_OSC0 | isolated ground for OSC0 main clock source |
| GND_OSCRTC | isolated ground for RTC oscillator |
| DGND | main ground reference net |
| V3_3D | digital 3.3V power |
| V5_0D | digital 5.0V power |
| GNDUSB0 | local ground for USB0 connector shield |
| GNDUSB1 | local ground for USB1 connector shield |
| V1_8D | digital 1.8V power |
| VSDMMC0 | digital SDMMC0 power supply (1.8V or 3.3V) |
| VBAT | main unregulated power supply (may be tied to 5V)
(needs to be 3.7 to 5.5V) |
| VEXPD | Unregulated power supply for the daughterboard |
| VADC | Power supply for the ADC |
| V5_0USB | 5.0V power supply for the VBUS on USB |
| V1_1D | Power supply for AM335x core |
| GNDA_TSC | Local analog ground for ADC/touch screen |
Table 1: AM335x IDK EVM Baseboard Power Nets
| Net | Description |
|---|---|
| DGND | main ground reference net |
| V3_3D | digital 3.3V power |
| V5_0D | digital 5.0V power |
| V1_8D | digital 1.8V power |
| V12_0D | 12.0V power for motor control |
| V24_0D | 24.0V power for common board requirements |
| V24_0MTR | 24.0V power for motor control |
| V24_0HVS | 24.0V power for industrial input/output |
| VPROFI | 5.0V power for profibus |
| VSTEL_VDC | 3.3V power for Stellaris Processor |
| VBAT | main unregulated power supply (may be tied to 5V)
(needs to be 3.7 to 5.5V) |
| VEXPD | Variable power supply for expansion board |
| GND_CAN | Local ground for the CAN bus |
| GNDPROFI | Local ground for the Profibus |
| GNDA_TSC | Local ground for the ADC |
| VADC | Power supply for the ADC |
Table 2: AM335x IDK EVM Industrial Daughterboard Power Nets
The power sequencing requirements of the AM335X processor (see the AM335x datasheet) are handled automatically by the TPS65910A PMIC.
Power Management IC Power Supplies[edit]
The AM335x Baseboard uses the TPS65910A power management IC.
The I2C0 on AM335x is used to control the Smart Reflex port and control port on the TPS65910A.
For AM335x, the following power supplies from the TPS65910A are used.
| TPS65910 Power Supply | AM335x Power Rail | Voltage |
|---|---|---|
| VAUX2 (300mA) | VDDSHV1, 3, 5,6 (500mA) | 3.3V (rails that are 3.3V) |
| VDIG1 (300mA) | VDDSHV1, 3, 5, 6 (500mA) | 1.8V (rails that are 1.8V) |
| VMMC (300mA) | VDDSHV4 (60mA) & VDDSHV2 | 1.8V/3.3V |
| VDD2 SMPS (1500mA) | VDD_CORE (1000mA) | 1.1V |
| VDD1 SMPS (1500mA) | VDD_MPU (1500mA) | 1.2V |
| No supply needed | VDD_RTC | 1.1V |
| VRTC | VDDS_RTC (10mA) | 1.8V |
| VIO_SMPS (1000mA) | VDDS_DDR (200mA) | 1.8V (or 1.5V for DDR3) |
| VIO_SMPS (1000mA) | VREFSSTL (10mA) | 0.9V |
| VDAC (150mA) | VDDS (100mA) | 1.8V |
| VDIG2 (300mA) | VDDS_SRAM_CORE_BG
(40mA)||1.8V | |
| VDIG2 (300mA) | VDDS_SRAM_MPU_BB (40mA) | 1.8V |
| VDIG2 (300mA) | VDDS_PLL_DDR (25mA) | 1.8V |
| VDIG2 (300mA) | VDDS_PLL_CORE_LCD (25mA) | 1.8V |
| VDIG2 (300mA) | VDDS_PLL_MPU (25mA) | 1.8V |
| VDIG2 (300mA) | VDDS_OSC (10mA) | 1.8V |
| VAUX1 (300mA) | VDDA1P8V_USB0/1 (50mA) | 1.8V |
| VAUX33 (150mA) | VDDA3P3V_USB0/1 (10mA) | 3.3V |
| VAUX33 (150mA) | USB_VBUS0/1 | 3.3V |
| VPLL (50mA) | VDDA_ADC | 1.8V |
| VDD3 SMPS (100mA) | Not Used | - |
| VIO_SMPS (1000mA) | DDR2 SDRAM (320mA) | 1.8V |
Table 3: AM335x Power supplies from TPS65910A
APM Sense Resistors[edit]
The AM335x Baseboard has the following subsystems with current sense resistors. These resistors allow the power to be measured on each power rail to check AM335x power requirements during real time software execution. The value of the resistors is selected to provide the best dynamic range when using a TI INA226 converter. In fact an INA226 converter is installed on the base board for both the VDD_CORE and VDD_MPU power supply rails of the AM335x. The other power rails have sense resistors but have their measurement connections attached to 2pin standard headers so that they can be read easily by a multimeter or connected to an INA226 converter EVM.
Note the value of the sense resistors for the VDD_CORE and VDD_MPU were selected to give better dynamic range for active power modes rather than sleep/low power modes. If power is to be measured for VDD_CORE or VDD_MPU for sleep/low power modes then this sense resistor value should be changed to give better shunt voltage values.
| Voltage Net | Sense Resistor Value |
|---|---|
| VDD_CORE | 0.05ohm |
| VDD_MPU | 0.05ohm |
| VDDSPLLMPU | 2ohm |
| VDDS_SRAMMPU_BB | 2ohm |
| VDDS_SRAM_CORE_BG | 2ohm |
| VDDA1P8V_USB0 | 1ohm |
| VDDA3P3V_USB0 | 2ohm |
| VDDS_PLL_DDR | 2ohm |
| VDDS_DDR | 0.24ohm |
| SA_VDDSHV1 | 0.24ohm |
| SA_VDDSHV2 | 0.24ohm |
| SA_VDDSHV3 | 0.24ohm |
| SA_VDDSHV4 | 0.24ohm |
| SA_VDDSHV5 | 0.24ohm |
| SA_VDDSHV6 | 0.24ohm |
| SA_VDDS | 0.24ohm |
| SA_VDDA_ADC | 1ohm |
| VDDS_PLL_CORE_LCD | 2ohm |
| VDDS_RTC | 2ohm |
| VDDS_OSC | 2ohm |
Table 4: AM335x Baseboard APM Sense Resistors
Configuration/Setup[edit]
The IDK EVM has many different subsystems to allow development around the AM335x's capabilities. All major subsystems are fixed with regard to address locations and pin assignments. Additionally, the AM335x has SYSBOOT pins that can be configured a certain way using two 8bit DIP switches on the base board.
Also, the motor driver chip, DRV8412, can be configured for one of several different modes. See the Motor Control section for configuration information.
I2C Address Assignments[edit]
In the AM335x IDK EVM boards, each separate board has an I2C ID memory that contains the details of the identity of that board such as it's configuration, etc. (see sections below for more details on the memories' contents). All the ID memories use I2C0 from AM335x (as does the Smart Reflex to the PMIC) so that software can always check I2C0 at the defined I2C addresses for the presence of a board and its contents. Therefore, the baseboard is the only board that has the ID memory set to 0x50, and the daughterboard's addresses are all 0x51 (only one daughterboard is ever connected at a time).
| AM335x IDK Baseboard Function | AM335x I2C Port | Address |
|---|---|---|
| Baseboard ID memory | I2C0 | 0x50 |
| AM335x PMIC Smart Reflex | I2C0 | 0x12 |
| AM355x PMIC Control | I2C0 | 0x2D |
Table 5: AM335x IDK Baseboard I2C Bus Addresses
| AM335x IDK Industrial Daughterboard Function | AM335x I2C Port | Address |
|---|---|---|
| Industrial Daughterboard ID memory | I2C0 | 0x51 |
| TPIC2810 | I2C1 | 0x60 |
I2C ID Memory[edit]
Both boards in the EVM have a dedicated I2C EEPROM which contains specific identity/configuration information for that board. In addition, there is available space in each memory for user specific configuration information.
The part number of the memory device is pn\\#CAT24C256WI-GT3.
| Name | Size (bytes) | Contents |
|---|---|---|
| Header | 4 | MSB 0xEE3355AA LSB |
| Board Name | 8 | Name for board in ASCII "A33515BB" = AM335x 15x15 Base Board |
| Version | 4 | Hardware version code for board in ASCII "1.0A" = rev. 01.0A |
| Serial Number | 12 | Serial number of the board. This is a 12 character string which is:
WWYY4P16nnnn where: WW = 2 digit week of the year of production YY = 2 digit year of production nnnn = incrementing board number |
| Configuration | 32 | Codes to show the configuration setup on this board. For the available EVM's supported, the following codes are used: ASCII "SKU#01" = base board for gen purpose evm ASCII "SKU#02" = base board for industrial motor control evm Remaining 26 bytes are reserved |
| reserved | 6 | reserved |
| reserved | 6 | reserved |
| reserved | 6 | reserved |
| Available | 32702 | Available space for other non-volatile codes/data |
Table 6: AM335x Baseboard EEPROM Data
| Name | Size (bytes) | Contents |
|---|---|---|
| Header | 4 | MSB 0xEE3355AA LSB |
| Board Name | 8 | Name for board in ASCII "A335IAMC" = AM335x Industrial Daughterboard |
| Version | 4 | Hardware version code for board in ASCII "1.0A" = rev. 01.0A |
| Serial Number | 12 | Serial number of the board. This is a 12 character string which is:
WWYY4P14nnnn where: WW = 2 digit week of the year of production YY = 2 digit year of production nnnn = incrementing board number |
| Configuration | 32 | Codes to show the configuration setup on this board. For the available EVM's supported, the following codes are used: ASCII "SKU#00" = standard gp daughterboard configuration Remaining 26 bytes are reserved |
| CPLD Version | 8 | CPLD code version for board in ASCII "CPLD1.0A" = rev. 01.0A of the CPLD |
| Available | 32700 | Available space for other non-volatile codes/data |
Table 7: AM335x IDK Industrial Daughterboard EEPROM Data
AM335x IDK EVM Functional Block Descriptions[edit]
This section describes major functional blocks of the AM335x IDK EVM System.
Board Identity Memory[edit]
Each of the boards contains a serial EEPROM that contains board specific data that allows the processor to automatically detect which board is connected and the version of that board. Other hardware specific data can be stored on this memory device as well. The part number of the memory device is pn\\#CAT24C256WI-GT3. See the Configuration/Setup section for details on the data in this memory.
SDMMC0 Connector[edit]
The SDMMC0 connector on the Base Board is a Morethanall card socket \\#MHC-W21-601. This is a standard SD/MMC Card type of connector. It is connected to the MMC0 port of the AM335x processor. Check the AM335x data sheet and TRM for supported card types/densities.
The Pin assignment is as given below.
| Pin No | Memory Card PIN No. |
|---|---|
| MMC plus & MMC mobile & MMC & RS-MMC & SD#1 | RSV/DAT3 |
| MMC plus & MMC mobile & MMC & RS-MMC & SD#2 | CMD |
| MMC plus & MMC mobile & MMC & RS-MMC & SD#3 | GND |
| MMC plus & MMC mobile & MMC & RS-MMC & SD#4 | VCC |
| MMC plus & MMC mobile & MMC & RS-MMC & SD#5 | CLK |
| MMC plus & MMC mobile & MMC & RS-MMC & SD#6 | GND |
| MMC plus & MMC mobile & MMC & RS-MMC & SD#7 | DAT0 |
| MMC plus & MMC mobile & SD#8 | DAT1 |
| MMC plus & MMC mobile & SD#9 | DAT2 |
| MMC plus & MMC mobile#10 | DAT4 |
| MMC plus & MMC mobile#11 | DAT5 |
| MMC plus & MMC mobile#12 | DAT6 |
| MMC plus & MMC mobile#13 | DAT7 |
| miniSD#1 | CD/DAT3 |
| miniSD#2 | CMD |
| miniSD#3 | GND |
| miniSD#4 | VCC |
| miniSD#5 | CLK |
| miniSD#6 | GND |
| miniSD#7 | DAT0 |
| miniSD#8 | DAT1 |
| miniSD#9 | DAT2 |
| miniSD#10 | NC |
| miniSD#11 | NC |
Table 8: AM335x SDMMC0 Connector Pin Details
10/100 Ethernet PRU Controlled[edit]
The AM335x Industrial Daughterboard has two 10/100 Ethernet transceivers, TI TLK110, that are connected to J8 & J9. These Ethernet transceivers are connected to the PRU0 & PRU1 units within the AM335x.
The reset on the transceiver is driven by the board system reset SYS_RESETn. A 25MHz crystal drives the clock signal for the AR8031. The Ethernet INT pins are not used in the IDK EVM.
The PHYAD pins are left unconnected for setting the PHY's address on the PRU0 Ethernet so it is by default 0x01. The PHYAD pins are left unconnected for setting the PHY's address on the PRU1 Ethernet so it is by default 0x03.
| Pin No | Signal Name | Description |
|---|---|---|
| 1 | ETHERx_RDP | Ethernet Data Rx Positive |
| 2 | ETHERx_RDN | Ethernet Data Rx Negative |
| 3 | Power | Power |
| 4 | Power | Power |
| 5 | ETHERx_TDP | Ethernet Data Tx Positive |
| 6 | ETHERx_TDN | Ethernet Data Tx Negative |
| 7 | NC | |
| 8 | GND | Ground |
| D1 | LINK LED Power | Power |
| D2 | LINKLED | Link LED Signal |
| D3 | Active LED Power | Power |
| D4 | ACTLED | Active LED Signal |
| M1 | NC | |
| M2 | NC | |
| SHLD1 | DGND | Ground |
| SHLD2 | DGND | Ground |
Table 9: AM335x 10/100 PRU Ethernet Pin Details
10/100 Ethernet[edit]
The AM335x Industrial Daughterboard has a 10/100 Ethernet transceiver, TI TLK110, that is connected to J14. This Ethernet transceiver is connected to the standard Ethernet switch MII1 within the AM335x.
The reset on the transceiver is driven by the board system reset SYS_RESETn. A 25MHz crystal drives the clock signal for the AR8031. The Ethernet INT pin is not used in the IDK EVM.
Some of the PHYAD pins are connected for setting the PHY's address so it is by default 0x1F.
| Pin No | Signal Name | Description |
|---|---|---|
| 1 | ETHERx_RDP | Ethernet Data Rx Positive |
| 2 | ETHERx_RDN | Ethernet Data Rx Negative |
| 3 | Power | Power |
| 4 | Power | Power |
| 5 | ETHERx_TDP | Ethernet Data Tx Positive |
| 6 | ETHERx_TDN | Ethernet Data Tx Negative |
| 7 | NC | |
| 8 | GND | Ground |
| D1 | LINK LED Power | Power |
| D2 | LINKLED | Link LED Signal |
| D3 | Active LED Power | Power |
| D4 | ACTLED | Active LED Signal |
| M1 | NC | |
| M2 | NC | |
| SHLD1 | DGND | Ground |
| SHLD2 | DGND | Ground |
Table 10: AM335x 10/100 Ethernet Pin Details
USB[edit]
The AM335x ZCZ package supports 2 USB ports. The USB ports are on the base board and connected to a microUSB AB connector and a standard A connector. The ESD device TPD4012 and common choke filter ACM2012 (TDK) are used on the USB signals before they are connected to the AM335x pins. The microAB connector has its ID pin tied to ground through a 120K resistor by default so that the port looks like a B device.
| Pin No | Signal Name | Description |
|---|---|---|
| 1 | VUSB_VBUS0 | USB0 BUS VOLTAGE |
| 2 | USB0_CONN_DM | USB0 DATA MINUS |
| 3 | USB0_CONN_DP | USB0 DATA PLUS |
| 4 | USB0_ID | USB0 IDENTIFICATION |
| 5 | DGND | Ground |
Table 11: AM335x USB Port0
| Pin No | Signal Name | Description |
|---|---|---|
| 1 | VUSB_VBUS1 | USB1 BUS VOLTAGE |
| 2 | USB1_CONN_DM | USB1 DATA MINUS |
| 3 | USB1_CONN_DP | USB1 DATA PLUS |
| 4 | DGND | Ground |
Table 12: AM335x USB Port1
RS-232 Connectors[edit]
The IDK Industrial Daughterboard has two RS-232 connectors (DB9 male) for two of the UART's on the AM335x. J10 is connected to UART3 of the AM335x and J12 is connected to UART5 of the AM335x. The MAX3232E is used for the RS-232 level translation. Hardware handshaking is not enabled for either of these ports.
CAN[edit]
The IDK Industrial Daughterboard has 1 CAN transceiver and connector for the CAN1 interface of the AM335x. The CAN transceiver that is used is the TI ISO1050 and the connector is a DB9 female connector.
| Pin No | Signal Name | Description |
|---|---|---|
| 1 | Reserved | Upgrade Path |
| 2 | CAN_L | Dominant Low |
| 3 | CAN_GND | Ground |
| 4 | Reserved | Upgrade Path |
| 5 | CAN_SHLD | Shield, Optional |
| 6 | GND | Ground, Optional |
| 7 | CAN_H | Dominant High |
| 8 | Reserved | Upgrade Path |
| 9 | CAN_V+ | Power, Optional |
Table 13: AM335x IDK Industrial Daughterboard CAN Connector Pin Details
A PSM712 transient voltage suppressor and RSZ-3.305HP isolated voltage regulator are connected to the ISO1050 for full industrial connection. The AM335x side line filters are calculated for a max CAN transmission speed of 10MHz.
ProfiBus[edit]
The IDK Industrial Daughterboard has 1 Profibus transceiver and connector for the UART1 interface of the AM335x. The Profibus transceiver that is used is the TI ISO1176T and the connector is a DB9 female connector. The Profibus voltage rail is sourced by a TPS76650 regulator U15.
| Pin No | Signal Name | Description |
|---|---|---|
| 1 | Reserved | Reserved |
| 2 | Reserved | Reserved |
| 3 | PROFIBUS_A | A Signal |
| 4 | Reserved | Upgrade Path |
| 5 | GND_PROFI | Ground reference |
| 6 | VPROFI | power supply |
| 7 | Reserved | Reserved |
| 8 | PROFIBUS_B | B Signal |
| 9 | Reserved | Reserved |
Table 15: AM335x IDK Industrial Daughterboard ProfiBus Connector Pin Details
A PSM712 transient voltage suppressor and TPS76650 voltage regulator are connected to the ISO1076T for full industrial connection.
Industrial Serializer (SPI)[edit]
The IDK Industrial Daughterboard has an ISO7641 industrial isolated serializer which is connected to an SN65HVS882 parallel input and output industrial latch. The isolated industrial inputs/outputs are 24V powered through R283.
Industrial Serializer (I2C)[edit]
The IDK Industrial Daughterboard has an TPIC2810 industrial serializer latch. This industrial serializer is connected to I2C1.
Piccolo DSP[edit]
The IDK Industrial Daughterboard has a TMS320F28027 DSP to allow motor control testing. There is a full subsystem to support the F28027 including JTAG header (shared with the Stellaris processor), reset button SW1, status LED, and ADC inputs from the motor subsystem. This F28027 is connected to the AM335x through the SPI bus.
Stellaris[edit]
The IDK Industrial Daughterboard has a LM3S5R31 processor which can provide safe mode protection for the motor control system. The JTAG connection is shared (chained) with the DSP F28027. Separate reset switch SW3 and indicator LED's are provided. The Stellaris processor communicates with the AM335x through the SPI1 channel. A test UART header J26 is provided.
Motor Control[edit]
The IDK Industrial Daughterboard has a DRV8412 motor driver. This circuit incorporates over temp and fault indicator LED's. Separate screw type connectors are provided for each motor leg so a variety of motors can be used. Either a separate power input (J23) for the motor section or the combined 24V power supply J32 can be used.
The mode set for the DRV8412 is configured by DIP switch SW2- 3&4. By default the driver is setup for mode 3 for dual full bridges. See the DRV8412 datasheet for the possible mode settings.
RS-485 / EnDAT[edit]
This industrial automation daughterboard has 2 SN65HVD10 transceivers for the UARTs for RS-485 or EnDAT connection.
EtherCAT LED's[edit]
The EtherCAT LED's are implemented as 4 LEDs D6-D9.
| D6 | RUN | green color |
| D7 | ERR | red color |
| D8 | Link/Act 0 | green color |
| D9 | Link/Act 1 | green color |
Table 17: AM335x IA Daughterboard EtherCAT LED's
ADC Inputs[edit]
The IDK Industrial Daughterboard has a test header J30 that can be used for connecting analog devices to the ADC of the AM335x.
| Signal | Pin No |
|---|---|
| 1 | ADC_AIN0 |
| 2 | ADC_AIN4 |
| 3 | ADC_AIN1 |
| 4 | ADC_AIN5 |
| 5 | ADC_AIN2 |
| 6 | ADC_AIN6 |
| 7 | ADC_AIN3 |
| 8 | ADC_AIN7 |
| 9 | VREF_TSC_RSV |
| 10 | GNDA_TSC |
Table 18: AM335x Industrial Daughter Board ADC Test Header Signals
NAND Flash Memory[edit]
The Industrial Daughterboard has a Micron NAND Flash Memory. This is a MT29F2G08AB 2Gb 8bit wide flash memory. The footprint is set to allow the 16bit version to be placed instead although there is no plan for this. This memory was placed on the daughterboard to allow active muxing of its signals and allow NOR/MMC1 connection.
| Pin No | Signal | Description |
|---|---|---|
| 1 | NC | |
| 2 | NC | |
| 3 | NC | |
| 4 | NC | |
| 5 | NC | |
| 6 | NC | |
| 7 | NAND_WAIT | NAND wait |
| 8 | NAND_OEn | NAND output enable |
| 9 | NAND_CSn | NAND chip select |
| 10 | NC | |
| 11 | NC | |
| 12 | VDDSHV1 | Power supply |
| 13 | DGND | Ground |
| 14 | NC | |
| 15 | NC | |
| 16 | NAND_BE0n_CLE | NAND Byte Enable 0 / Command Latch Enable |
| 17 | NAND_ADVN_ALE | NAND Address Valid / Address Latch Enable |
| 18 | NAND_WEn | NAND Write Enable |
| 19 | NAND_WPn | NAND Write Protect |
| 20 | NC | |
| 21 | NC | |
| 22 | NC | |
| 23 | NC | |
| 24 | NC | |
| 25 | DGND | Ground |
| 26 | NAND_D8 | NAND Data |
| 27 | NAND_D9 | NAND Data |
| 28 | NAND_D10 | NAND Data |
| 29 | NAND_D0 | NAND Data |
| 30 | NAND_D1 | NAND Data |
| 31 | NAND_D2 | NAND Data |
| 32 | NAND_D3 | NAND Data |
| 33 | NAND_D11 | NAND Data |
| 34 | VDDSHV1 | Power supply |
| 35 | NC | |
| 36 | DGND | Ground |
| 37 | VDDSHV1 | Power supply |
| 38 | NC | |
| 39 | VDDSHV1 | Power supply |
| 40 | NAND_D12 | NAND Data |
| 41 | NAND_D4 | NAND Data |
| 42 | NAND_D5 | NAND Data |
| 43 | NAND_D6 | NAND Data |
| 44 | NAND_D7 | NAND Data |
| 45 | NAND_D13 | NAND Data |
| 46 | NAND_D14 | NAND Data |
| 47 | NAND_D15 | NAND Data |
| 48 | DGND | Ground |
Table 19: AM335x NAND Pin Details
SPI Flash Memory[edit]
The IDK Industrial Daughterboard has a 64Mb SPI Flash device which is a W25Q64CVSSIG device. This is connected to the SPI1 port on the AM335x. Write protect is off by default.
Pin Use Description[edit]
Functional Interface Mapping[edit]
Most signals of the AM335x are connected to a fixed device on the EVM where it is used for a specific function. A few of the signals of the AM335x such as the SPI signals, however, are connected to devices on the EVM based on the logic within the CPLD. The only use of the CPLD in fact for the standard IDK is to use the states of two GPIO signals XDMA_EVENT_INTR0 and UART0_RTSn to enable the SPI chip selects for the Piccolo, Stellaris, and industrial serializer ISO7641 U18.
XDMA_EVENT_INTR0 UART0_RTSn SPI Device Enabled
0 0 Industrial Serializer
0 1 None
1 0 Stellaris
1 1 Piccolo
GPIO Definitions[edit]
See this pinmux document File:Am335x idkevm pinuse rev1 1.pdf which shows the use case for the AM335x signals on the IDK. Developer can select and enable pins based on the selective peripheral pins as output or input. For the IDK EVM, each single pin is muxed based on the functional needs of the EVM.
Board Connectors[edit]
Expansion Connectors[edit]
The expansion connector details are listed in the tables below.
| Pin No | Signal | Description |
|---|---|---|
| 1 | V1_8D | Power 1.8V supply |
| 2 | V5_0D | Power 5.0V rail |
| 3 | GPMC_AD7 | GPMC Address & Data |
| 4 | RMII1_RXD3 | RMII Receive Data bit 3 |
| 5 | GPMC_AD6 | GPMC Address & Data |
| 6 | RMII1_TXCLK | RMII Transmit Clock |
| 7 | GPMC_AD5 | GPMC Address & Data |
| 8 | RMII1_RXCLK | RMII Receive Clock |
| 9 | GPMC_AD4 | GPMC Address & Data |
| 10 | RMII1_RXD2 | RMII Receive Data bit 2 |
| 11 | GPMC_AD3 | GPMC Address & Data |
| 12 | RMII1_TXD2 | RMII Transmit Data bit 2 |
| 13 | GPMC_AD2 | GPMC Address & Data |
| 14 | RMII1_RXDV | RMII Receive Data Valid |
| 15 | GPMC_AD1 | GPMC Address & Data |
| 16 | RMII1_TXD3 | RMII Transmit Data bit 3 |
| 17 | GPMC_AD0 | GPMC Address & Data |
| 18 | RMII1_TXD1 | RMII Transmit Data bit 1 |
| 19 | GPMC_CS2n | GPMC Chip Select |
| 20 | RMII1_TXD0 | RMII Transmit Data bit 0 |
| 21 | GPMC_CS1n | GPMC Chip Select |
| 22 | RMII1_RXD1 | RMII Receive Data bit 1 |
| 23 | SPI0_D1 | SPI Data |
| 24 | SPI0_CS0 | SPI Chip Select |
| 25 | PMIC_PWR_EN | |
| 26 | SYS_RESETn | System reset |
| 27 | DGND | Ground |
| 28 | DGND | Ground |
Table 21: AM335x EXP0 Connector
| Pin No | Signal | Description |
|---|---|---|
| 1 | NOT USED | |
| 2 | NOT USED | |
| 3 | NOT USED | |
| 4 | NOT USED | |
| 5 | NOT USED | |
| 6 | NOT USED | |
| 7 | DGND | Ground |
| 8 | DGND | Ground |
| 9 | NOT USED | |
| 10 | NOT USED | |
| 11 | SYS_WARMRESETn | System warm reset |
| 12 | EXP_PB_POWERON | Power ON |
| 13 | NOT USED | |
| 14 | NOT USED | |
| 15 | NOT USED | |
| 16 | NOT USED | |
| 17 | NOT USED | |
| 18 | NOT USED | |
| 19 | GPMC_WAIT | GPMC Wait |
| 20 | NOT USED | |
| 21 | GPMC_WPn | GPMC Write Protect |
| 22 | NOT USED | |
| 23 | GPMC_CLK | GPMC Clock |
| 24 | NOT USED | |
| 25 | GPMC_CS0n | GPMC Chip Select |
| 26 | GPMC_ADVn_ALE | GPMC Address Valid / Address Latch Enable |
| 27 | NOT USED | |
| 28 | GPMC_BE0n_CLE | GPMC Byte Enable 0 / Command Latch Enable |
Table 22: AM335x EXP1 Connector
| Pin No | Signal | Description |
|---|---|---|
| 1 | DGND | Ground |
| 2 | GPMC_BE1n | GPMC Byte Enable 1 |
| 3 | RMII1_REFCLK | RMII Reference Clock |
| 4 | GPMC_CS3n | GPMC Chip Select |
| 5 | RMII1_RXD0 | RMII Receive Data bit 0 |
| 6 | GPMC_OEn_REn | GPMC Output / Read Enable |
| 7 | MDIO_DATA | MDIO Data |
| 8 | GPMC_WEn | GPMC Write Enable |
| 9 | MDIO_CLK | MDIO Clk |
| 10 | DGND | Ground |
| 11 | DGND | Ground |
| 12 | MMC0_CLK | MMC Clock |
| 13 | SPI0_CLK | SPI Clock |
| 14 | MMC0_CMD | MMC Command |
| 15 | SPI0_D0 | SPI Data |
| 16 | MMC0_DAT0 | MMC Data Bus |
| 17 | SPI0_CS1 | SPI Chip Select |
| 18 | WAKEUP | |
| 19 | ECAP0_IN_PWM0_OUT | enhanced capture 0 input or Auxiliary PWM0 out |
| 20 | DGND | Ground |
| 21 | UART0_CTSn | UART Clear to Send |
| 22 | MMC0_DAT1 | MMC Data Bus |
| 23 | UART0_RTSn | UART Request to Send |
| 24 | MMC0_DAT2 | MMC Data Bus |
| 25 | UART0_RXD | UART Receive Data |
| 26 | MMC0_DAT3 | MMC Data Bus |
| 27 | UART0_TXD | UART Transmit Data |
| 28 | XDMA_EVENT_INTR0 | External DMA Event or Interrupt 0 |
| 29 | UART1_CTSn | UART Clear to Send |
| 30 | DGND | Ground |
| 31 | UART1_RTSn | UART Request to Send |
| 32 | XDMA_EVENT_INTR1 | External DMA Event or Interrupt 1 |
| 33 | UART1_RXD | UART Receive Data |
| 34 | RMII1_COL | RMII Colision |
| 35 | UART1_TXD | UART Transmit Data |
| 36 | RMII1_CRS | RMII Carrier Sense |
| 37 | DGND | Ground |
| 38 | RMII1_RXERR | RMII Receive Data Error |
| 39 | V3_3D | Power 3.3V supply |
| 40 | RMII1_TXEN | RMII Transmit Enable |
Table 23: AM335x EXP2 Connector
| Pin No | Signal | Description |
|---|---|---|
| 1 | MCASP0_ACLKX | McASP0 Transmit Bit Clock |
| 2 | GPMC_A0 | GPMC Address |
| 3 | DGND | Ground |
| 4 | GPMC_A1 | GPMC Address |
| 5 | MCASP0_FSX | McASP0 Transmit Frame Sync |
| 6 | GPMC_A2 | GPMC Address |
| 7 | MCASP0_AXR0 | McASP0 Serial Data (IN/OUT) |
| 8 | GPMC_A3 | GPMC Address |
| 9 | EXP3_P9 | |
| 10 | GPMC_A4 | GPMC Address |
| 11 | VDDSHV2 | Power supply for SDMMC cards |
| 12 | GPMC_A5 | GPMC Address |
| 13 | MCASP0_AHCLKR | McASP0 Receive Master Clock |
| 14 | DGND | Ground |
| 15 | V3_3D | Power 3.3V supply |
| 16 | GPMC_A6 | GPMC Address |
| 17 | MCASP0_ACLKR | McASP0 Receive Bit Clock |
| 18 | GPMC_A7 | GPMC Address |
| 19 | VEXPD | VBAT spower |
| 20 | DGND | Ground |
| 21 | MCASP0_FSR | McASP0 Receive Frame Sync |
| 22 | GPMC_A8 | GPMC Address |
| 23 | MCASP0_AXR1 | McASP0 Serial Data (IN/OUT) |
| 24 | GPMC_A9 | GPMC Address |
| 25 | DGND | Ground |
| 26 | GPMC_A10 | GPMC Address |
| 27 | MCASP0_AHCLKX | McASP0 Transmit Master Clock |
| 28 | GPMC_A11 | GPMC Address |
Table 24: AM335x EXP3 Connector
LCD Connectors[edit]
The connector details of LCD are described below.
| Pin No | Signal | Description |
|---|---|---|
| 1 | V5_0D | Power 5.0V rail |
| 2 | V5_0D | Power 5.0V rail |
| 3 | LCD_DATA1 | LCD data bus |
| 4 | LCD_DATA0 | LCD data bus |
| 5 | LCD_DATA3 | LCD data bus |
| 6 | LCD_DATA2 | LCD data bus |
| 7 | LCD_DATA5 | LCD data bus |
| 8 | LCD_DATA4 | LCD data bus |
| 9 | LCD_DATA12 | LCD data bus |
| 10 | LCD_DATA10 | LCD data bus |
| 11 | LCD_DATA23 | LCD data bus |
| 12 | LCD_DATA14 | LCD data bus |
| 13 | LCD_DATA19 | LCD data bus |
| 14 | LCD_DATA22 | LCD data bus |
| 15 | I2C0_SDA | I2C0 Data |
| 16 | LCD_DATA11 | LCD data bus |
| 17 | LCD_VSYNC | LCD Vertical Sync |
| 18 | DGND | Ground |
| 19 | DGND | Ground |
| 20 | DGND | Ground |
Table 25: AM335x LCD Connector 1
| Pin No | Signal | Description |
|---|---|---|
| 1 | VEXPD | Power variable supply |
| 2 | V1_8D | Power 1.8V supply |
| 3 | LCD_DATA20 | LCD data bus |
| 4 | LCD_DATA21 | LCD data bus |
| 5 | LCD_DATA17 | LCD data bus |
| 6 | LCD_DATA18 | LCD data bus |
| 7 | LCD_DATA15 | LCD data bus |
| 8 | LCD_DATA16 | LCD data bus |
| 9 | LCD_DATA7 | LCD data bus |
| 10 | LCD_DATA13 | LCD data bus |
| 11 | LCD_DATA8 | LCD data bus |
| 12 | V5_0D | Power 5.0V rail |
| 13 | LCD_DATA9 | LCD data bus |
| 14 | I2C0_SCL | I2C0 Clock |
| 15 | LCD_DATA6 | LCD data bus |
| 16 | LCD_PCLK | LCD pixel clock |
| 17 | LCD_DEN | |
| 18 | LCD_HSYNC | LCD Horizontal Sync |
| 19 | DGND | Ground |
| 20 | DGND | Ground |
Table 26: AM335x LCD Connector 2
This is the touchscreen connector.
| Pin No | Signal | Description |
|---|---|---|
| 1 | TSC_GIO0 | GIO0 |
| 2 | V3_3D | Power 3.3V supply |
| 3 | TSC_GIO1 | GIO1 |
| 4 | TSC_I2CSCL | I2C SCLK for touchscreen |
| 5 | TSC_CLK | Source clock for touchscreen controller |
| 6 | TSC_I2CSDA | I2C SDATA for touchscreen |
| 7 | TSC_RSV0 | Reserved |
| 8 | TSC_GIO2 | GIO2 |
| 9 | TSC_RSV1_VREF | Reserved power pin |
| 10 | DGND | Ground |
| 11 | GNDA_TSC | Analog ground |
| 12 | GNDA_TSC | Analog ground |
| 13 | TSC_AIN4 | ADC4 input |
| 14 | TSC_AIN0 | ADC0 input |
| 15 | TSC_AIN5 | ADC5 input |
| 16 | TSC_AIN1 | ADC1 input |
| 17 | TSC_AIN6 | ADC6 input |
| 18 | TSC_AIN2 | ADC2 input |
| 19 | TSC_AIN7 | ADC7 input |
| 20 | TSC_AIN3 | ADC3 input |
Table 27: AM335x Touchscreen Connector
EVM Important Notices[edit]
Note: The Standard Terms And Conditions for TI Evaluation Modules can be downloaded from here:http://www.ti.com/lit/pdf/sszz027
ANNEX[edit]
This HUG is prepared by using the following documents as references.
- AM335x Sitara ARM Microprocessors TRM (SPRUH73)
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