User:DanRinkes/InProcess/Using STM Trace on the 6678

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Purpose

The Purpose of this document is to describe the steps needed to run a System Trace on the C6678 Processor.

Details

Start Date: 02/21/2011

End Date:

CCS Install Details

• Code Composer Studio Version : 4.2.1.00004
• Emulation Patch Version : 5.0.281.1

Install Location

• C:\CCStudio_4.2.1.00004

Additional Needed Files and Where to Get Them

• C66x_trace.gel - TBD
• Example .out file

These are tentatively included in the .zip file referenced below.

Steps

• Set Environment Variable TI_TRACE_LOGGING = 6 so that if we have trouble doing this, we can submit trace log to support.
• In the CCS4 Configuration, there are a number of files that were not included in the CCS Release that are needed to use System Trace. These files are included in the .zip file here. A bit of manual manipulation is needed, as described in the steps below.
  • Extract the .zip file in your CCS Install Directory. (The top level of the .zip file is the ccsv4 directory.)
    • The following files should get put in the following locations. If you have problems, make sure these are present.
      • Sh-XDS560v2-Mezz.ccxml
      • stm_ex_d_corepacN.c66xx.out
      • ccsv4\emulation\gel\C66x_trace.gel
      • ccsv4\common\targetdb\devices\shannon_tms320c66xx.xml
      • ccsv4\emulation\analysis\xmldb\trace_config\devices\device_c6678.xml
  • Move the .ccxml file to your particular directory where these are stored (typically Documents and Settings\<your user name>\user\CCSTargetConfigurations
• When you open the Sh-XDS560v2-Mezz from within CCS, you need to point it to the GEl file that you are using to initialize the board.
  • Open the .ccxml file from within CCS
  • Click the Advanced Tab (at the bottom)
  • Select each core and use the Browse button next to "initialization script" to point to your gel file.
    • It's sometimes easier to do this for the first core, and then copy and paste the path to each of the other cores because CCS doesn't remember the path betweeh selections of different cores so you have to navigate N times.
    • At some point we need to also load the C66x_trace.gel file. You can do this manually from within CCS. But the simplest way might be to edit your existing GEL file and add a GEL_LoadGel("<path to gel>\\<gel filename>"); to one of the callback functions (e.g. OnTargetConnect()). You could potentially only load this file on a single core, but it's easier to load it on all of them.
      • Be sure to use double backslashes in the GEL_LoadGel() function. See the CCS documentation on this function for more details
• Launch Debugger
• Connect to The Desired Cores
• Connect to the STM (CSSTM_0)
• While one of the active C66x cores is selected execute the following GEL functions
  • Scripts->PSC Configure For Debug->initPscForDebug
  • Scripts->DRM Utilities->DRM_setDP4To0ForStmTrace
• Set Up the Trace receiver
  • Select the CSSTM Device
  • Tools->Trace Control->Receiver
    • Choose 560v2 Trace
    • OK (Default values should be fine, but you might increase the DTC Buffer Size (e.g. 4 MB)
      • Trace Bits: 4
      • Trace Connector: Autodetect
      • DTC Buffer Size: 4 Mb
      • Host Buffer Size : Unlimited
      • Synchronize trace with target execution : Checked
      • Trace Buffer Type : Stop on buffer full
      • Trace Test Pattern : Off
    • Click Apply
• Load the .out file into multiple cores
• Select Tools->Trace Analyzer->Open Trace Connection in New View-><Emulator Name>/CSSTM_0
• Simultaneously Run the cores with the .out file loaded

Expected Results

In the trace display window, you should see a set of results with outputs in the Master Name column from all of the cores that were run. Expect to see about 120 samples for each core that was run for this example.