TSK stack content during context switching

Overview

When using DSP/BIOS it is the responsibility of the user to make sure that each task is setup with a sufficiently large stack. A good estimate can be made by checking the stack watermark in the Kernel Object Viewer (KOV) as shown in the stack overflow section of this article. However, there's no guarantee that you've seen the absolute worst case. For example, if an interrupt occurs while you're stack is at its "natural peak" then that will cause the stack to use even more space!

In order to make sure you definitely have enough space for interrupts you should leave some padding on the stack. So how much padding is sufficient to protect against an interrupt occurring at the worst possible moment? The short answer is 632 bytes for c6000 architecture on BIOS 5.x. Keep reading if you would like to know more of the details.

Details on the TSK switch

In DSP/BIOS, each TSK (task) has its own stack. This means that BIOS never copies content of one TSK stack to another.

There are several ways for a context switch to occur:

1. Synchronous
   • Happens through the code, e.g. TSK_sleep, TSK_yield, SEM_pend, etc.
   • In this case 14 words (56 bytes) of space are needed for c6000 architecture. This corresponds to the "save on entry" registers, i.e. preserved by "child function" from the C calling conventions as documented in the compiler guide.
2. Asynchronous (no resulting context switch)
   • Happens due to an interrupt, e.g. interrupt occurs but previously executing task resumes execution on return from interrupt
   • In this case 66 words (264 bytes) of space are needed for c6000 architecture. This corresponds to the "save on call" registers, i.e. preserved by "parent function" from the C calling conventions as documented in the compiler guide.
3. Asynchronous (context switch occurs)
   • An interrupt occurs and does a SEM_post, or perhaps the CLK interrupt occurs which makes a higher priority task ready. On return from the interrupt a different task executes.
   • This scenario requires all the registers of the first two cases to be saved as well as 12 additional registers related to the ISR stack. Therefore a total of 92 words (368 bytes) are needed in this scenario.
4. Asynchronous (context switch) + Asynchronous (no context switch)
   • This one is a bit of a corner case, but is the worst case scenario.
   • Here's the sequence of events leading up to this scenario:
     1. Task1 is executing and an asynchronous switch occurs, e.g. SEM_post from an interrupt
     2. Context switch occurs and Task2 begins execution.
     3. Task2 completes execution and now Task1 becomes ready again.
     4. While the BIOS task switch code is running, i.e. just after Task2 stopped running and just before Task1 begins running again, an interrupt occurs without a coxtext switch.
   • In this scenario you would consume 158 words (632 bytes) of stack, i.e. 92 words from the asynchronous switch and 66 words from the asynchronous with no switch.

So in order to protect against the worst case scenario you would need to pad your stack by an additional 632 bytes.