StarterWare LCDC

Raster LCD

Introduction

Raster LCD Controller is used to display image on LCD panel.Raster LCD Controller is a synchronous LCD interface. It provides timing and data for constant graphics refresh to a passive display. Graphics data is processed and stored in frame buffers. A frame buffer is a contiguous memory block in the system. A built-in DMA engine supplies the graphics data to the Raster engine which, in turn, outputs to the external LCD device.

Programing Sequence

To program the raster controller, the following sequence can be used.

• Enable clock for LCD module.
• Pin multiplexing registers to enable LCD raster pin and a standard configuration is provided as part of the function LCDPinMuxSetup() in platform directory
• Enable Software Clock for DMA,LIDD submodule and for Core(which encompasses raster active and passive matrix logic) by invoking RasterClocksEnable() API.
• Configure the rate at which pixel data should be output by configuring pixel clock frequency by invoking RasterClkConfig() API.
• Configuring the DMA for single or double frame buffer ,busrst size for DMA data transfer etc is done by invoking RasterDMAConfig() API.
• Configuring Panel type(TFT or STN) ,color display or monochrome, 1/2/4/8/16/24 bit per pixel mode (packed or unpacked(only for 24 bit)) is done invoking RasterModeConfig()API.
• Configure the polarity of various timing parameters (for example frame clock , pixel clock, line clock etc.) used by raster by invoking RasterTiming2Configure()
• Configure the Horizontal timing parameters and pixel per line of the raster by invoking RasterHparamConfig() API.
• Configure the vertical timing parameters and Pixel per panel of the raster invoking RasterVparamConfigure() API.
• Configure the required amount of FIFO delay by invoking RasterFIFODMADelayConfig()
• Configure the base address register with base address of the array which contain pixels of the image to be displayed and ceiling address register with end address of the same array using API RasterDMAFBConfig()
• Enable End of frame 0 and 1 interrupt by invoking RasterIntEnable() API;
• Enable the Raster by inovking RasterEnable().

Note: Text in blue refers to the configuration steps applicable to LCDC IP of the following SoCs.

• AM335x