Preventing EMI Issues

Introduction

Many projects will require some kind of EMI (electromagnetic interference) certification before they can be productized. The EMI certification tests come very late in the project schedule and can cause unexpected delays if the board does not pass. This article is intended to help figure out what might be causing EMI issues and how to fix it. More importantly, this article is intended to help you avoid EMI issues from the beginning. If you have experienced an EMI issue that is not addressed by this article, please add to this article based on your experience!

Causes of EMI

EMI is often caused by the switching of signals, e.g. power supply, clocks, memory interface, etc. This is referred to as narrowband interference and generally occurs at very specific frequencies related to components on your board.

Reducing/Eliminating EMI

There are many potential sources of EMI on a board. Before you can eliminate an EMI issue you must first identify it. Generally you should be able to correlate the frequency at which you're failing with a frequency on the board (or a multiple). Let's take a look at a few common scenarios and how you can reduce/eliminate EMI.

Memory Interface

As DDR becomes faster and wider, this interface becomes a common source for issues. Recognizing this issue, TI has provided application notes for all devices with a DDR interface with very detailed guidance on how to layout your board. This guidance encompasses items such as the number and size of bypass capacitors as well as the stackup and routing. It's critical to follow all of these recommendations.

Further on this topic, many of these DDR app notes give you an option of whether or not to use series termination resistors (STRs). An advantage of using STRs is that you have one additional "knob" to twiddle with respect to EMI. If you choose not to use STRs, make sure you configure the "weak drive strength" option in supported devices. For example, in the TMS320C6424 this is configured in the SDBCR register in the DDRDRIVE field (0=normal, 1=weak).

Turn off unnecessary output clocks!

Many processors have a pin that outputs a scaled version (e.g. /2) of the input clock. This pin is useful in board bring-up in looking for "signs of life" in your processor. It may even switch frequencies once the PLL is enabled or reset is released depending on the given device to help you see the device's progress in starting up.

Using the TMS320C6424 as an example, there is a pin called CLKOUT0 that outputs whatever is present on CLKIN. This output can be turned off by writing VDD3P3V_PWDN[CLKOUT]=1 as documented in its datasheet.

Use sufficient decoupling caps

Don't skimp on the decoupling caps! They have a big effect on EMI. Make sure you properly decouple all the rails (core, I/O, DDR, etc.). These will also help you maintain a constant power rail which can save you a lot of stability headaches as well.

Many TI devices require an EMI filter on the PLL's power supply. On the TMS320C6424 the datasheet mentions a specific Murata EMI filter that should be used on the PLLPWR18 pin. Generally these filters will have a notch in their frequency response at the desired CPU speed in order to give maximum attenuation to that EMI.

Recommended Reading

EDN's Designer's Guide to Electromagnetic Compatibility, 2nd Edition