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Persistent Registry in ARM-A8 BSP
Contents
Introduction[edit]
ARM-A8 BSP already has persistent storage available in NAND/SD for users to save their documents and files across reboot. To enable saving registry and user profiles on these persistent storage requires some changes in the registry settings. In addition, ARM-A8 BSP requires some changes to its own bus driver to support DEVFLAGS_BOOTPHASE_1 load flags for drivers so that they are not loaded twice. This article describes:
- changes already done to support NAND persistent registry
- changes required to support SD persistent registry
- patch required for OMAP BUS driver to support DEVFLAGS_BOOTPHASE_1 load flag.
NOTE: All these changes have been added in ARM_A8_BSP_02_30_00 Release.
To Enable persistent registry in NAND, enable the following items in Catalog Item view:
Kernel features->Persistent Hive Registry Storage Kernel features->Persistent Hive Registry Storage ->use NAND device
To Enable persistent registry in SD card, enable the following items in Catalog Item view:
Kernel features->Persistent Hive Registry Storage Kernel features->Persistent Hive Registry Storage->use SD or MMC device
Conventions[edit]
The examples in this article mainly target changes required for EVM_OMAP3530 BSP on CE6 (BSP 01.02.00 release). The users can use this article as a guideline to implement persistent registry on any other TI ARM A8 BSP for CE6 or WEC7. Note that the changes may not apply as is. The required changes for persistent storage have been highlighted in green. For non-green portion of examples, please use the values/settings that apply to your BSP.
NAND Persistent Registry Storage[edit]
If using BSP 1.02+ release or BSP 2.x release, then this is already implemented and user just need to select the Catalog item:
WEC7: Third Party | <BSP>:ARMV7 | Kernel Features | Persistent Hive Registry Storage
CE6 : Third Party | <BSP>:ARMV4I | Kernel Features | Persistent Hive Registry Storage
Implementation Details[edit]
1. Enable Hive based registry support, fat filesystem and partition driver in Catalog.
2. Create new flag IMGREGHIVE_NAND (either in BSP catalog or <BSP>.bat file). When this flag is enabled, enable following flags
- PRJ_ENABLE_FSREGHIVE - This flag is used by kernel to turn off bootable flag for Object Store filesystem.
- PRJ_ENABLE_REGFLUSH_THREAD - This flag enables creation of a registry flushing thread. See msdn for details.
3. Change NAND driver to load in bootphase 1 only by including the NAND driver registry and its storage manager profiles under HIVE_BOOT_SECTION and using 0x1000 in the load flags for NAND driver.
; HIVE BOOT SECTION [HKEY_LOCAL_MACHINE\Drivers\BuiltIn\MSFlash] "Dll"="omap_nand.dll" "Prefix"="DSK" "Index"=dword:1 "Order"=dword:4 "MemBase"=multi_sz:"6E000000","08000000" "MemLen"=multi_sz:"00001000","00001000" ;"DmaCh"=dword:3 ; CE_DRIVER_BLOCK_GUID "IClass"="{A4E7EDDA-E575-4252-9D6B-4195D48BB865}" "Profile"="MSFlash" <span style="color: green">"Flags"=dword:00011000</span> ; END HIVE BOOT SECTION
4. If using FATFS filesystem on NAND, change that profile to mount the NAND FATFS partition as bootable filesystem.
; HIVE BOOT SECTION [HKEY_LOCAL_MACHINE\System\StorageManager\Profiles\MSFlash\FATFS] "Flags"=dword:14 "EnableWriteBack"=dword:1 "FormatTFAT"=dword:1 "Paging"=dword:1 IF IMGREGHIVE_NAND "MountAsBootable"=dword:1 "MountAsRoot"=dword:0 "MountPermanent"=dword:1 ; Do not allow un-mounting (else we'd fail to flush the registry) "MountAsROM"=dword:0 "MountHidden"=dword:0 "CheckForFormat"=dword:0 ; Ask the OAL if we should format on boot (i.e. cold reset) ENDIF
[HKEY_LOCAL_MACHINE\System\StorageManager\Profiles\MSFlash] "DriverPath"="Drivers\\BuiltIn\\MSFlash" "LoadFlags"=dword:1 "Order"=dword:0 "AutoMount"=dword:1 "AutoPart"=dword:0 "AutoFormat"=dword:0 "DefaultFileSystem"="FATFS" "PartitionDriver"="mspart.dll" "Folder"="Mounted Volume" ; END HIVE BOOT SECTION
5. If using a root file system other than Object Store, then you need to disable Bootable flag for that filesystem. For example, in BSP 2.x for WEC7, RamDisk is used as the root filesystem.
; HIVE BOOT SECTION [HKEY_LOCAL_MACHINE\System\StorageManager\Profiles\RAMDisk\FATFS] "Flags"=dword:14 "FormatTFAT"=dword:1 IF IMGREGHIVE_NAND ! "MountAsBootable"=dword:1 ENDIF "MountAsRoot"=dword:1 "MountPermanent"=dword:1 ; END HIVE BOOT SECTION
SD/MMC Persistent Storage[edit]
Implementation Details[edit]
1. Enable Hive based registry support and fat filesystem in Catalog.
2. Create new flag IMGREGHIVE_SD (either in BSP catalog or <BSP>.bat file). When this flag is enabled, enable following flags
- PRJ_ENABLE_REGFLUSH_THREAD - This flag enables creation of a registry flushing thread. See msdn for details.
3. Change SD and its dependent drivers to load in bootphase 1 only by including the respective driver registry and SD/MMC storage manager profiles under HIVE_BOOT_SECTION and using 0x1000 in the load flags for the drivers.
Following BSP drivers need this change:
- GPIO (gpio.reg)
; HIVE BOOT SECTION IF BSP_OMAP_GPIO [HKEY_LOCAL_MACHINE\Drivers\BuiltIn\OMAP_GPIO] "Prefix"="GIO" "Dll"="omap_gpio.dll" "Index"=dword:1 "order"=dword:0 "Flags"=dword:1000 ENDIF BSP_OMAP_GPIO ; END HIVE BOOT SECTION
- DMA (dma.reg)
; HIVE BOOT SECTION IF BSP_OMAP_SDMA [HKEY_LOCAL_MACHINE\Drivers\BuiltIn\DMA] "Prefix"="DMA" "Dll"="omap_sdma.dll" "Index"=dword:1 "Order"=dword:0 "PowerFlags"=dword:00000103 ; no notifications "priority256"=dword:61 "Flags"=dword:1000 ENDIF ; END HIVE BOOT SECTION
- TPS659XX (tps659xx.reg) (EVM_OMAP3530 only)
; HIVE BOOT SECTION IF BSP_TPS659XX [HKEY_LOCAL_MACHINE\Drivers\BuiltIn\TWL] "Prefix"="TWL" "Dll"="tps659xx.dll" "Index"=dword:1 "Order"=dword:1 "Gpio"=dword:0 ;interrupt is CPU GPIO 0 ; CE_DRIVER_POWER_MANAGEABLE_GENERIC_GUID "IClass"=multi_sz:"{A32942B7-920C-486b-B0E6-92A702A99B35}" "Flags"=dword:1000 ENDIF BSP_TPS659XX ; END HIVE BOOT SECTION
- TPS659XX GPIO (tps659xx_gpio.reg) (EVM_OMAP3530 only)
; HIVE BOOT SECTION IF BSP_TPS659XX_GPIO [HKEY_LOCAL_MACHINE\Drivers\BuiltIn\TPS_GPIO] "Prefix"="GIO" "Dll"="tps659xx_gpio.dll" "Index"=dword:2 "order"=dword:0 "Flags"=dword:1000 ENDIF BSP_TPS659XX_GPIO ; END HIVE BOOT SECTION
- SDHC (sdhc.reg)
; HIVE BOOT SECTION ; @CESYSGEN IF CE_MODULES_SDBUS ;; @XIPREGION IF PACKAGE_OEMDRIVERS IF BSP_SDHC [HKEY_LOCAL_MACHINE\Drivers\BuiltIn\SDHC] "Prefix"="SHC" "Dll"="omap_sdhc.dll" "Index"=dword:1 "Order"=dword:21 "PowerFlags"=dword:00000103 ; send pre/post device state changes "MemBase"=multi_sz:"4809C000" "MemLen"=multi_sz:"00000200" "SDIOPriority"=dword:d3 "CDPriority"=dword:d4 IF BSP_SDHIGHSPEEDSUPPORT_SDHC1 "BaseClockFrequency"=dword:2DC6C00 ; override the max clock rate (48 MHz) ELSE "BaseClockFrequency"=dword:16e3600 ; override the max clock rate (24 MHz default) ENDIF "ReadWriteTimeout"=dword:1000 ; (0x1000 clock ticks default) "DTOTimeout"=dword:200 ; Data timeout in milliseconds - 512 ms default "WakeupSources"=dword:3 ; 0 - no wakeup, 1 - wakeup on SDIO, ; 2 - wakeup on card detect, ; 3 - wakeup on both "CardDetectGPIO"=dword:100 ; card insertion detection is GPIO_0 on Triton (256 + 0) "CardInsertedState"=dword:0 ; logical 0 means a card is inserted "CardWPGPIO"=dword:3F ; card R/W protection detection is done via GPIO 63 "CardWriteProtectedState"=dword:1 ; logical 1 means the card is write protected "SlotNumber"=dword:1 IF MMCHS1_LOW_VOLTAGE "LowVoltageSlot"=dword:1 ; 1 if MMC/SD/SDIO slot 1 is a low voltage (1.8V slot) ENDIF "Sdio4BitDisable"=dword:0 ; 1 if SDIO cards must use 1 bit data path, 0 for 4 bit data path "SdMem4BitDisable"=dword:0 ; 1 if SD Memory cards must use 1 bit data path, 0 for 4 bit data path IF BSP_SDHIGHSPEEDSUPPORT_SDHC1 "SDHighSpeedSupport"=dword:1 ; 1 to enable high speed SD support ELSE "SDHighSpeedSupport"=dword:0 ; 1 to enable high speed SD support ENDIF ; CE_DRIVER_POWER_MANAGEABLE_GENERIC_GUID, PMCLASS_PMEXT_GUID "IClass"=multi_sz:"{A32942B7-920C-486b-B0E6-92A702A99B35}", "{0AE2066F-89A2-4D70-8FC2-29AEFA68413C}" "Flags"=dword:1000 ENDIF BSP_SDHC ;; @XIPREGION ENDIF PACKAGE_OEMDRIVERS ; @CESYSGEN ENDIF CE_MODULES_SDBUS ; END HIVE BOOT SECTION
In addition, following default registry settings provided by Microsoft should be included within HIVE_BOOT_SECTION
- SD Bus Driver (add to sdhc.reg)
; HIVE BOOT SECTION ; @CESYSGEN IF CE_MODULES_SDBUS [HKEY_LOCAL_MACHINE\Drivers\BuiltIn\SDBusDriver] "Order"=dword:15 "Dll"="SDBus.dll" "Prefix"="SDC" "ThreadPriority"=dword:64 ; default thread priority for dispatch thread "RequestListDepth"=dword:30 ; pre-allocated requests "IClass"=multi_sz:"{20FA98A8-B298-4b32-8D72-C716AEE2FA84}=%b","{6F40791D-300E-44E4-BC38-E0E63CA8375C}=%b" "Flags"=dword:1000 ; @CESYSGEN ENDIF CE_MODULES_SDBUS ; END HIVE BOOT SECTION
- SDCard Client Drivers (SDMemory_Class, MMC_Class and their High_Capacity versions) (add to sdhc.reg)
; HIVE BOOT SECTION ; @CESYSGEN IF CE_MODULES_SDMEMORY ; SD Memory Storage class driver [HKEY_LOCAL_MACHINE\Drivers\SDCARD\ClientDrivers\Class\SDMemory_Class] "Dll"="SDMemory.dll" "Prefix"="DSK" "BlockTransferSize"=dword:40 ; send no more than 64 blocks of data per bus transfer ;"SingleBlockWrites"=dword:1 ; alternatively force the driver to use single block access ;"IdleTimeout"=dword:7D0 ; 2000 milliseconds ;"IdlePowerState"=dword:2 ; 0 == D0, 1 == D1, etc. ;"DisablePowerManagement"="" ; if value present, then disable (remove value to enable) "Profile"="SDMemory" "IClass"=multi_sz:"{A4E7EDDA-E575-4252-9D6B-4195D48BB865}", "{8DD679CE-8AB4-43c8-A14A-EA4963FAA715}" ; SDHC Memory Storage class driver [HKEY_LOCAL_MACHINE\Drivers\SDCARD\ClientDrivers\Class\SDMemory_Class\High_Capacity] "Dll"="SDMemory.dll" "Prefix"="DSK" "BlockTransferSize"=dword:40 ; send no more than 64 blocks of data per bus transfer ;"SingleBlockWrites"=dword:1 ; alternatively force the driver to use single block access ;"IdleTimeout"=dword:7D0 ; 2000 milliseconds ;"IdlePowerState"=dword:2 ; 0 == D0, 1 == D1, etc. ;"DisablePowerManagement"="" ; if value present, then disable (remove value to enable) "Profile"="SDMemory" "IClass"=multi_sz:"{A4E7EDDA-E575-4252-9D6B-4195D48BB865}", "{8DD679CE-8AB4-43c8-A14A-EA4963FAA715}" ; MMC Storage Class Driver [HKEY_LOCAL_MACHINE\Drivers\SDCARD\ClientDrivers\Class\MMC_Class] "Dll"="SDMemory.dll" "Prefix"="DSK" "BlockTransferSize"=dword:40 ; send no more than 64 blocks of data per bus transfer ;"SingleBlockWrites"=dword:1 ; alternatively force the driver to use single block access ;"IdleTimeout"=dword:7D0 ; milliseconds ;"IdlePowerState"=dword:2 ; 0 == D0, 1 == D1, etc. ;"DisablePowerManagement"="" ; if value present, then disable (remove value to enable) "Profile"="MMC" "IClass"=multi_sz:"{A4E7EDDA-E575-4252-9D6B-4195D48BB865}", "{8DD679CE-8AB4-43c8-A14A-EA4963FAA715}" ; @CESYSGEN ENDIF CE_MODULES_SDMEMORY ; END HIVE BOOT SECTION
- SD/MMC profiles (SDMemory, SDHCMemory (WEC7), MMC) (add to sdhc.reg)
; HIVE BOOT SECTION ; @CESYSGEN IF CE_MODULES_SDMEMORY [HKEY_LOCAL_MACHINE\System\StorageManager\Profiles\SDMemory] "Name"="SD Memory Card" "Folder"="Storage Card" ;"PartitionDriver"="" ; removable storage cannot have partitions [HKEY_LOCAL_MACHINE\System\StorageManager\Profiles\MMC] "Name"="MMC Card" "Folder"="Storage Card" ;"PartitionDriver"="" ; removable storage cannot have partitions ; @CESYSGEN ENDIF CE_MODULES_SDMEMORY ; END HIVE BOOT SECTION
4. Mount SD profiles as Bootable. In the example below, we are marking all the SD profiles as bootable so that any type of SD card that is inserted into the device can be used for persistent registry. This assumes we have only one SD slot on the device. If you have multiple SD slots on your device, then this section may need some tweaking because kernel will save the registry into the first bootable system it finds. So if you have 2 SD slots, then the first one to get detected and mounted will have the persistent registry.
; HIVE BOOT SECTION IF IMGREGHIVE_SD ; @CESYSGEN IF CE_MODULES_SDMEMORY [HKEY_LOCAL_MACHINE\System\StorageManager\Profiles\SDMemory] "MountAsBootable"=dword:1 "MountPermanent"=dword:1 ; Do not allow un-mounting (else we fail to flush the registry) [HKEY_LOCAL_MACHINE\System\StorageManager\Profiles\MMC] "MountAsBootable"=dword:1 "MountPermanent"=dword:1 ; Do not allow un-mounting (else we fail to flush the registry) ; @CESYSGEN ENDIF CE_MODULES_SDMEMORY ENDIF IMGREGHIVE_SD ; END HIVE BOOT SECTION
5. Disable bootable flag for the root filesystem (ex: Object Store, RAMdisk, etc)
; HIVE BOOT SECTION IF IMGREGHIVE_SD ; @CESYSGEN IF FILESYS_FSYSRAM [HKEY_LOCAL_MACHINE\System\StorageManager\AutoLoad\ObjectStore] "MountAsBootable"=- ; @CESYSGEN ENDIF FILESYS_FSYSRAM ENDIF IMGREGHIVE_SD ; END HIVE BOOT SECTION
; HIVE BOOT SECTION [HKEY_LOCAL_MACHINE\System\StorageManager\Profiles\RAMDisk\FATFS] "Flags"=dword:14 "FormatTFAT"=dword:1 IF IMGREGHIVE_SD ! "MountAsBootable"=dword:1 ENDIF "MountAsRoot"=dword:1 "MountPermanent"=dword:1 ; END HIVE BOOT SECTION
OMAP BUS Driver Patches[edit]
Bootphase Patch[edit]
Since ARM A8 BSP has its own bus driver, changes are required for the omap bus driver to not load the driver the second time when DEVFLAGS_BOOTPHASE_1 flag (0x1000) is specified for that particular driver. This patch is needed for SD driver to load properly when it is included in Boot registry (boot phase 1).
1. PLATFORM\COMMON\SRC\SOC\COMMON_TI_V1\COMMON_TI\BUS\MDD\defaultbus.h
- Add a new flag m_bootphase in DefaultBus_t class.
class DefaultBus_t : public BusDriver_t
{
protected:
// This bus interface type
INTERFACE_TYPE m_busType;
....
....
// Child devices container
DefaultBusChildContainer_t* m_pChildContainer;
//bootphase info
DWORD m_bootphase;
....
....
public:
//----------------------------------------------------------------------
// Driver_t interface, see Driver.hxx for comments
virtual
BOOL
PostInit(
);
....
....
virtual
BOOL
IoCtlSetConfigurationData(
DWORD space,
DWORD slotNumber,
DWORD offset,
DWORD length,
VOID *pBuffer
);
DWORD
GetBootphase(){return m_bootphase;};
//----------------------------------------------------------------------
};
2. PLATFORM\COMMON\SRC\SOC\COMMON_TI_V1\COMMON_TI\BUS\MDD\defaultbus.cpp
- Use the Bootphase2 event signalled by kernel to determine the current bootphase.
BOOL
DefaultBus_t::
Init(
LPCWSTR context,
LPCVOID pBusContext
)
{
BOOL rc = FALSE;
DEVMGR_DEVICE_INFORMATION info;
HKEY hKey = NULL;
UNREFERENCED_PARAMETER(pBusContext);
DEBUGMSG(ZONE_FUNCTION, (L"DefaultBus_t::"
L"+Init('%s', 0x%08x)\r\n", context, pBusContext
));
....
....
switch (m_busType)
{
case Internal:
if (m_deviceName == L"$bus\\BuiltInPhase1")
{
m_busPrefix = L"InternalPhase1_";
}
else if (m_deviceName == L"$bus\\BuiltIn")
{
m_busPrefix = L"InternalPhase2_";
}
else
{
m_busPrefix = L"Internal_";
}
break;
case PCIBus:
m_busPrefix = L"Pci_";
break;
default:
m_busPrefix = L"Other_";
break;
}
{
m_bootphase = 1;
HANDLE hevBootPhase2 = OpenEvent(EVENT_ALL_ACCESS, FALSE, _T("SYSTEM/BootPhase2"));
if (hevBootPhase2)
{
if( WaitForSingleObject(hevBootPhase2, 0) == WAIT_OBJECT_0)
{ // If Phase2 Signaled.
m_bootphase = 2;
}
}
CloseHandle(hevBootPhase2);
}
if (PostInit() == FALSE)
{
DEBUGMSG(ZONE_ERROR, (L"ERRROR: DefaultBus_t::Init: "
L"post init failed\r\n"
));
goto cleanUp;
}
....
....
}
3. PLATFORM\COMMON\SRC\SOC\COMMON_TI_V1\COMMON_TI\BUS\MDD\defaultbuschild.cpp
- Do not load the DLL if m_flag has DEVFLAGS_BOOTPHASE_1 set and it is not bootphase 1.
BOOL
DefaultBusChild_t::
IoCtlActivateChild(
)
{
BOOL rc = FALSE;
HANDLE hBus;
INTERFACE_TYPE busType;
DWORD busNumber;
REGINI regini[3];
CEDEVICE_POWER_STATE powerState;
// If flag is set to avoid load, simply exit
if ((m_flags & DEVFLAGS_NOLOAD) != 0)
{
return TRUE;
}
if (((m_flags & DEVFLAGS_BOOTPHASE_1)!=0) && (m_pBus->GetBootphase()!=1))
return TRUE;
// Get bus information
m_pBus->GetBusInfo(hBus, busType, busNumber);
....
....
}
SetPowerState Patch[edit]
Current bus driver (01.02.00 and 02.00.00 releases) turn off PMIC resources on D4 regardless of that module's functional clock being on or off. This leads to the instability of that module. This patch adds a check for functional clock count before turning off PMIC resources. This patch only applies to EVM_OMAP3530 BSP.
Note: This is not a mandatory patch for persistent registry to work but it is good to have.
1. PLATFORM\EVM_OMAP3530\SRC\DRIVERS\BUS\t2powerbus.h
- Add additional input parameter clockCnt to PreDevicePowerStateChange() and PostDevicePowerStateChange() functions
virtual
DWORD
PreDevicePowerStateChange(
DWORD devId,
CEDEVICE_POWER_STATE oldPowerState,
CEDEVICE_POWER_STATE newPowerState,
DWORD clockCnt
);
virtual
DWORD
PostDevicePowerStateChange(
DWORD devId,
CEDEVICE_POWER_STATE oldPowerState,
CEDEVICE_POWER_STATE newPowerState,
DWORD clockCnt
);
2. PLATFORM\EVM_OMAP3530\SRC\DRIVERS\BUS\t2powerbus.cpp
- Add check for clockCnt in PostDevicePowerStateChange() function.
DWORD T2PowerBus_t:: PreDevicePowerStateChange( DWORD devId, CEDEVICE_POWER_STATE oldPowerState, CEDEVICE_POWER_STATE newPowerState, DWORD clockCnt ) { UCHAR state; DWORD rc = FALSE; UNREFERENCED_PARAMETER(clockCnt); if (newPowerState == oldPowerState) return rc; .... .... }
DWORD T2PowerBus_t:: PostDevicePowerStateChange( DWORD devId, CEDEVICE_POWER_STATE oldPowerState, CEDEVICE_POWER_STATE newPowerState, DWORD clockCnt ) { UCHAR state; BOOL rc = FALSE; if (newPowerState == oldPowerState) return rc; switch (devId) { case OMAP_DEVICE_HSOTGUSB: if (clockCnt>0) break; if (newPowerState >= D3) { .... .... } if (newPowerState == D4) { .... .... } rc = TRUE; break; case OMAP_DEVICE_MMC1: if (clockCnt>0) break; // assign MMC1 power resource to GROUP_NONE in order to turn off LDO // (setting to OFF state alone doesn't turn off LDO) if (newPowerState == D4) { .... .... } break; case OMAP_DEVICE_DSS: if (clockCnt>0) break; if (newPowerState == D4) { .... .... } break; case OMAP_DEVICE_CAMERA: if (clockCnt>0) break; if (newPowerState == D4) { .... .... } break; case OMAP_DEVICE_MMC2: if (clockCnt>0) break; if (newPowerState == D4) { .... .... } break; default: // signal we don't want notification for this device rc = -1; } return rc; }
3. PLATFORM\COMMON\SRC\SOC\COMMON_TI_V1\COMMON_TI\INC\powerbus.h
- Add additional input parameter clockCnt to PreDevicePowerStateChange() and PostDevicePowerStateChange() functions
virtual
DWORD
PreDevicePowerStateChange(
DWORD devId,
CEDEVICE_POWER_STATE oldPowerState,
CEDEVICE_POWER_STATE newPowerState,
DWORD clockCnt
) = 0;
virtual
DWORD
PostDevicePowerStateChange(
DWORD devId,
CEDEVICE_POWER_STATE oldPowerState,
CEDEVICE_POWER_STATE newPowerState,
DWORD clockCnt
) = 0;
4. PLATFORM\COMMON\SRC\SOC\COMMON_TI_V1\COMMON_TI\BUS\OMAPBUS\omap35xxbus.cpp
- Pass Functional clock count to the Pre and Post Device state change functions.
DWORD
omap35xxBus_t::
PreDevicePowerStateChange(
DWORD devId,
CEDEVICE_POWER_STATE oldState,
CEDEVICE_POWER_STATE newState
)
{
DWORD rc = (DWORD) -1;
if (devId < OMAP_MAX_DEVICE_COUNT)
{
rc = s_pPowerBus->PreDevicePowerStateChange(devId, oldState, newState, s_refCountTbl.refCount_FClk[devId]);
}
return rc;
}
DWORD
omap35xxBus_t::
PostDevicePowerStateChange(
DWORD devId,
CEDEVICE_POWER_STATE oldState,
CEDEVICE_POWER_STATE newState
)
{
DWORD rc = (DWORD) -1;
if (devId < OMAP_MAX_DEVICE_COUNT)
{
rc = s_pPowerBus->PostDevicePowerStateChange(devId, oldState, newState, s_refCountTbl.refCount_FClk[devId]);
}
return rc;
}
5. PLATFORM\AM35x_BSP\SRC\DRIVERS\BUS\am3517bus.h
- Since AM3517 derives from omapPowerBus_t class, dummy changes are required here.
virtual
DWORD
PreDevicePowerStateChange(
DWORD devId,
CEDEVICE_POWER_STATE oldPowerState,
CEDEVICE_POWER_STATE newPowerState,
DWORD clockCnt
);
virtual
DWORD
PostDevicePowerStateChange(
DWORD devId,
CEDEVICE_POWER_STATE oldPowerState,
CEDEVICE_POWER_STATE newPowerState,
DWORD clockCnt
);
6. PLATFORM\AM35x_BSP\SRC\DRIVERS\BUS\am3517bus.cpp
- Since AM3517 derives from omapPowerBus_t class, dummy changes are required here.
DWORD AM3517Bus_t:: PreDevicePowerStateChange( DWORD devId, CEDEVICE_POWER_STATE oldPowerState, CEDEVICE_POWER_STATE newPowerState, DWORD clockCnt ) { .... UNREFERENCED_PARAMETER(clockCnt); .... } //----------------------------------------------------------------------------- DWORD AM3517Bus_t:: PostDevicePowerStateChange( DWORD devId, CEDEVICE_POWER_STATE oldPowerState, CEDEVICE_POWER_STATE newPowerState, DWORD clockCnt ) { .... UNREFERENCED_PARAMETER(clockCnt); .... }
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