NAND devices supported on OMAP3

The OMAP3 supports various types of NAND devices, however to boot over NAND the RBL or the ROMCODE checks for specific NAND device, the type of NAND devices supported by ROMCODE on OMAP3xxx/AM3xxx/DM37xx are described below.

ROM code first writes 0x90 and then 0xFF to reset the NAND Then it writes 0x90 to address 0x0 and then reads 4 bytes Byte 0, Byte 1, Byte2 and Byte 3 Byte 1 is then used to search for the ID

Here is a list of NAND IDs that are supported.

 0xF1  0xB1  0xC1  0xAA  0xDA  0xBA  0xCA  0x36  0x76  0x46  0x56  0x35  0x75  0x45  0xF5  0x55  0x33  0x73
 0x43  0x53  0xE3  0xE6  0x79  0x78  0xA1  0x72  0x74  0xAC  0xDC  0xBC  0xCC  0xA3  0xD3  0xB3  0xC3  0xA5
 0xD5  0xB5  0xC5  0xA2  0xF2  0xB2  0xC2  0x39  0x49  0x59

If the ID is not found in the table, the ROM will try to read ID2 – Note - some NANDs don’t support ID2.

The ID2 expected by the ROM code must be of the following format - ID2 data decoding

 byte 0 - Page Size   (power of 2)
 byte 1 - Block Size  (power of 2)
 byte 2 - Block Count (power of 2)
 byte 3 - Spare Size
 byte 4 - Cycles count : column addr.[7..4], row addr. [3..0]
 byte 5 - ECC type [7..4], Bus Width [3..0] (power of 2)  

check if parameters are valid:

1) only 8 or 16 bus width is supported
2) only 512 or 2048 page size are supported, 
3) block size must be grater than page size
4) address cycles number must be less or equal 5

If the ID is found in the table, the ROM looks up the table to see the number of address cycles needed. If the address cycles are more than 4, ROM code uses Byte3 to calculate the page size and block size as follows, as follows

 page size  using bits[1:0] .. 00-1kB 01-2kB 10-4kB 11-8kB
 block size using bits[5:4] .. 00-64kB 01-128kB 10-256kB 11-512kB

If the number of cycles in the table is less than 4, then the ROM will read the NAND geometry information directly from the table.

 Note - OMAP3 ROMs do not support ONFI Protocl