NOTICE: The Processors Wiki will End-of-Life on January 15, 2021. It is recommended to download any files or other content you may need that are hosted on processors.wiki.ti.com. The site is now set to read only.
MCSDK Inter Processor Communication Demonstration Guide
Multicore Software Development Kit
Inter-Processor Communication
Demonstration Guide
Last updated: 06/12/2014
Overview[edit]
The Inter-Processor Communications (IPC) demo provides an example that can be run on the EVM.
Requirements[edit]
The aim of this demo is to show Inter processor control path communication between A15 Host and C66x DSP.
Software Design[edit]
The IPC in this context is MessageQ based IPC between ARM to DSP . This transport is based on rpmsg for communication between ARM and DSPs, and a proprietary shared memory protocol for communication between DSPs. MessageQ is a reliable control path for inter-processor communication. See reference to details at Control_path_IPC. The demo application uses a IPC benchmark application MessageQBench. Please see details at IPC_BenchMarking
Run Instructions[edit]
The Matrix application launcher will start automatically when the system boots up. Once the target EVM gets an IP address assigned by the DHCP server, type the IP address to an Internet browser running on a remote computer (Target EVM should be accessible through network connection by the remote computer).
Click on "Demonstrations" icon.
Click on "IPC Demo" icon
Click on "Run" Button and see the following results.
The results show the IPC round trip delay measured.