MCSDK HPC 3.x OpenMP

OpenMP on 66AK2H SoCs

Last updated: 09/23/2014

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OpenMP is the de facto industry standard for shared memory parallel programming. It enables incremental parallelization of existing code bases and is portable across shared memory architectures. The OpenMP 4.0 specification added an accelerator model that enables a programmer to direct execution to heterogeneous cores. More information on the OpenMP API (including the API specification) is available at http://www.openmp.org.

Programming Models on the 66AK2H

On 66AK2H, OpenMP is available on the ARMs using gcc and the corresponding runtime, libgomp. OpenMP on the DSPs is available via the following programming models:

• OpenMP Accelerator Model: A subset of the OpenMP 4.0 specification relating to target constructs that enables execution on heterogeneous devices.
• OpenMP Dispatch With OpenCL. A TI-specific extension to the OpenCL runtime that allows OpenCL kernels to dispatch OpenMP regions. See the OpenCL Runtime User Guide for more information on TI's OpenCL implementation.

Documentation

• OpenMP Accelerator Model Getting Started
• OpenMP Accelerator Model User's Guide
• OpenMP Accelerator Model Examples

How to Obtain Support

Post your questions and suspected defects to the High Performance Computing forum with the tag openmp.