Interrupt Latency Checker

Interrupt Latency Checker (ILC)

Interrupt Latency checker is a trace feature on simulator, which provide users a deterministic measure of the worst-case interrupt latency of the application code.

• Interrupt Latency - Duration between receiving an interrupt and processing the interrupt.

Why we need ILC?

• Possibility of missing interrupt due to programmatic errors or long non-interruptible loops that may not be caught before system integration
• Interrupt latency reported by customer and algorithm supplier are different. Need a deterministic way to calculate latency.

Existing method to calculate Interrupt Latency

• Modify the application, by adding a periodic interrupt. Due to application interrupt latency, the execution of this periodic interrupt can be delayed.
• This delay should be measured. E.g., the associated interrupt service routine (ISR) could implement either of the following two approaches:
  • Record the maximum difference between (actual time of invocation - expected time of invocation).
  • Record the maximum skid in cycles from the time the interrupt was executed last to the time the ISR is executed this time.

(Make sure no other interrupts can preempt this ISR, as they could otherwise distort the measurements.)

• Run the code on the target, and retrieve the recorded maximum delay at the end of the test run.
• Depending on the periodic interrupt period, and when the ISR happened to occur at run-time in relationship to application sections of disabled interrupts, this recorded maximum delay is an indication for the interrupt latency.

Problem with existing method

• Intrusive
  • The act of measuring changes the application behavior.
• Measurement Time is high since
  • Code keeps jumping to the ISR.
• Needs a lot of automation support to be built. Not very trivial to do this

Advantage

• Provide the users a deterministic measure of the worst-case interrupt latency of the code.
• Based on the approach of monitoring sources of interrupt enables/disables
  • Non-intrusive: Monitor GIE writes, branch delay slots, NMI writes in c6000 for example.
  • Get the worst case latency for a test vector.
  • Characterize the interrupt latency of the algorithm.

Usage

Follow the steps given below to get ILC traces.

• Load GEL file "interruptlatencydetector.gel" located in "<CCS install dir>/cc/gel". (Note: Threshold is set to 500 by default.)

1. Load the application on the simulator
2. Identify “Start Profile Point” and “End Profile point”
3. Set the Threshold latency.
4. Run the application until the “Start Profile Point”.
5. Run GEL command 'Start profiling'
6. Run the application until the “End Profile Point”
7. Run GEL command 'Stop profiling'
8. Quit the CCS to observe the Interrupt Latency Profile. [For efficiency reason, the log is interrupt latency profile log is complete only on simulation quit]
9. The older ILC generated a CSV file, but the newer tool generates an XML file that will be present in the same folder as the executable (*.out file). File name of the XML file is same as the .out file but with a .xml extention.

• Note: In case of multiple Start and End Profile Points, repeat step 4 to 7 for every {Start Profile Point, End Profile Point} set

CCSv4 Usage

Simulators which support ILC will have GEL menu under scipts tab in CCSv4. If the menu is not available load the GEL file (tisim_ilc.gel) from <CCSv4 Install Dir>\ccsv4\simulation\env\ccs\import\tisim_ilc.gel

To generate the ILC trace follow the steps given in Usage section above.

Supported configuration

ILC is supported on all C6000 simulator configuration in CCSv3.3 or above.

ILC is also supported on following list of ARM configuration.

• ARM9e Simulator
  
• Cortex-M3 CPU Simulator
  
• Cortex-R4 CPU Simulator
  

FAQ

• Q: How can I change the threshold value?

Open the "interruptlatencydetector.gel" GEL file in the CCS editor & change the threshold to the desired value. The change will take effect on upon reloading the GEL file and running the set threshold gel command.

• Q: Is it possible to get ILC information on hardware?

Yes. You can get ILC information on hardware through XDS560 trace. For more information check the link.

Addtional information

Training presentation on ILC link.

• XDS560 Trace on selected devices (e.g. 64x+) can be utilized for interrupt profiing on hardware targets. This would allow for true interrupt latency measurement on hardware.