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Determining DSPLink shared memory size requirements

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Overview[edit]

This page gives information about how certain trace prints within DSPLink can be used to determine the shared memory requirements of DSPLink. Using this information, an optimum memory map can be created by the system integrator.

Details[edit]

The shared memory requirements for DSPLink vary based on the configuration in which DSPLink has been built. Each DSPLink module has its own shared memory requirements, and based on the modules included within the build, the shared memory requirements are different.
In addition, DSPLink configuration allows the system integrator to create multiple memory segments, into which DSPLink modules can be placed. For example, the default DSPLink configuration ships with two memory regions: DSPLINKMEM & DSPLINKMEM1. Information about the shared memory usage within the different memory regions will also be required in order to optimize the memory usage.

The procedure to identify the exact shared memory requirements, the procedure detailed on this page can be followed to:

  • Get trace prints giving information about the shared memory requirements of each module
  • Analyze the trace prints to get the required information about total shared memory consumption by DSPLink within the different memory regions

The information, logs and analysis provided below applies to the DSPLink v1.50. However, similar trace prints are also available from 1.40.03 release onwards.

Procedure to enable the prints for shared memory usage[edit]

Follow the steps detailed at the wiki page about enabling trace in DSPLink to enable trace prints within DSPLink

  • Enable trace
  • Disable user-level prints
  • Set severity to TRC_LEVEL4

<syntaxhighlight lang=c> TRC_SET_SEVERITY (TRC_LEVEL4) ; </syntaxhighlight>

  • Uncomment the lines that enable trace for all LDRV modules

<syntaxhighlight lang=c> TRC_ENABLE (ID_LDRV_ALL)  ; TRC_ENABLE (ID_LDRV_DATA_ALL)  ; TRC_ENABLE (ID_LDRV_DRV_ALL)  ; TRC_ENABLE (ID_LDRV_DSP_ALL)  ; TRC_ENABLE (ID_LDRV_HAL_ALL)  ; TRC_ENABLE (ID_LDRV_IPS_ALL)  ; TRC_ENABLE (ID_LDRV_MQT_ALL)  ; TRC_ENABLE (ID_LDRV_POOL_ALL)  ; </syntaxhighlight>

Log[edit]

To get the log of shared memory usage, run any sample application within DSPLink, or even your own application.
Trace prints such as the following will be seen (this is extracted from log seen when running the DSPLink message sample application on DM6446:

LDRV_DRV Ctrl GPP address [0xc4100000]
LDRV_DRV Ctrl DSP address [0x8fe05000]
LDRV_DRV Ctrl size        [0x100]
SHMDRV Ctrl GPP address [0xc4100100]
SHMDRV Ctrl DSP address [0x8fe05100]
SHMDRV Ctrl size [0x80]
LDRV_IPS Ctrl GPP address [0xc4100180]
LDRV_IPS Ctrl DSP address [0x8fe05180]
LDRV_IPS Ctrl size        [0x80]
IPS Ctrl GPP address [0xc4098000]
IPS Ctrl DSP address [0x8fe00000]
IPS Ctrl size        [0x2380]
LDRV_POOL Ctrl GPP address [0xc4100200]
LDRV_POOL Ctrl DSP address [0x8fe05200]
LDRV_POOL Ctrl size        [0x80]
SMAPOOL shared memory GPP address      [0xc4100280]
SMAPOOL shared memory DSP address      [0x8fe05280]
SMAPOOL shared memory physical address [0x8fe05280]
SMAPOOL shared memory size             [0x70000]
SMAPOOL Ctrl GPP address               [0xc4100480]
MPCS Ctrl GPP address      [0xc4170280]
MPCS Ctrl DSP address      [0x8fe75280]
MPCS Ctrl physical address [0x8fe75280]
MPCS Ctrl size             [0x8200]
MPLIST Ctrl GPP address      [0xc4178480]
MPLIST Ctrl DSP address      [0x8fe7d480]
MPLIST Ctrl physical address [0x8fe7d480]
MPLIST Ctrl size             [0x2200]
LDRV_MQT Ctrl GPP address [0xc417a680]
LDRV_MQT Ctrl DSP address [0x8fe7f680]
LDRV_MQT Ctrl size        [0x80]
ZCPYMQT Ctrl GPP address [0xc417a700]
ZCPYMQT Ctrl DSP address [0x8fe7f700]
ZCPYMQT Ctrl size [0x480]
LDRV_DATA Ctrl GPP address [0xc417ab80]
LDRV_DATA Ctrl DSP address [0x8fe7fb80]
LDRV_DATA Ctrl size        [0x80]
ZCPYDATA Ctrl GPP address [0xc417ac00]
ZCPYDATA Ctrl DSP address [0x8fe7fc00]
ZCPYDATA Ctrl size        [0x2e00]
ZCPYDATA freeChirps address [0xc417d200]
RINGIO Ctrl GPP address      [0xc409a380]
RINGIO Ctrl DSP address      [0x8fe02380]
RINGIO Ctrl physical address [0x8fe02380]
RINGIO Ctrl size             [0x2200]
SMAPOOL buffers start GPP address      [0xc4100d00]
SMAPOOL buffers start DSP address      [0x8fe05d00]

Log analysis[edit]

Relevant information from the log[edit]

The above log gives the following important information about start physical address of each module, and the shared memory size consumed by that module (Note that DSP address is the same as physical address on DM6446):

LDRV_DRV Ctrl DSP address [0x8fe05000]
LDRV_DRV Ctrl size        [0x100]

SHMDRV Ctrl DSP address [0x8fe05100]
SHMDRV Ctrl size [0x80]

LDRV_IPS Ctrl DSP address [0x8fe05180]
LDRV_IPS Ctrl size        [0x80]

IPS Ctrl DSP address [0x8fe00000]
IPS Ctrl size        [0x2380]

LDRV_POOL Ctrl DSP address [0x8fe05200]
LDRV_POOL Ctrl size        [0x80]
SMAPOOL shared memory physical address [0x8fe05280]
SMAPOOL shared memory size             [0x70000]

MPCS Ctrl physical address [0x8fe75280]
MPCS Ctrl size             [0x8200]

MPLIST Ctrl physical address [0x8fe7d480]
MPLIST Ctrl size             [0x2200]

LDRV_MQT Ctrl DSP address [0x8fe7f680]
LDRV_MQT Ctrl size        [0x80]

ZCPYMQT Ctrl DSP address [0x8fe7f700]
ZCPYMQT Ctrl size [0x480]

LDRV_DATA Ctrl DSP address [0x8fe7fb80]
LDRV_DATA Ctrl size        [0x80]

ZCPYDATA Ctrl DSP address [0x8fe7fc00]
ZCPYDATA Ctrl size        [0x2e00]

RINGIO Ctrl physical address [0x8fe02380]
RINGIO Ctrl size             [0x2200]

SMAPOOL buffers start DSP address      [0x8fe05d00]

Related Configuration information[edit]

Two shared memory regions are defined in the DSPLink configuration file for DM6446: <syntaxhighlight lang=c>

   {
       0,                     /* ENTRY          : Entry number */
       "DSPLINKMEM",          /* NAME           : Name of the memory region */
       0x8FE00000,            /* ADDRPHYS       : Physical address */
       0x8FE00000,            /* ADDRDSPVIRT    : DSP virtual address */
       (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
       0x5000,                /* SIZE           : Size of the memory region */
       TRUE                   /* SHARED         : Shared access memory? */
   },
   {
       1,                     /* ENTRY          : Entry number */
       "DSPLINKMEM1",         /* NAME           : Name of the memory region */
       0x8FE05000,            /* ADDRPHYS       : Physical address */
       0x8FE05000,            /* ADDRDSPVIRT    : DSP virtual address */
       (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
       0xFB000,               /* SIZE           : Size of the memory region */
       TRUE                   /* SHARED         : Shared access memory? */
   },

</syntaxhighlight>

Analysis for DSPLINKMEM region[edit]

Start address: 0x8fe000000
Corresponding log prints:

IPS Ctrl DSP address [0x8fe00000]
IPS Ctrl size        [0x2380]

RINGIO Ctrl physical address [0x8fe02380]
RINGIO Ctrl size             [0x2200]

This indicates that total shared memory size used within DSPLINKMEM region out of the 0x5000 defined size is: 0x2380 + 0x2200 =
0x4580
Based on this, size of DSPLINKMEM region can be safely reduced to 0x4580.

Analysis for DSPLINKMEM1 region[edit]

Start address: 0x8fe05000
Corresponding log prints:

LDRV_DRV Ctrl DSP address [0x8fe05000]
LDRV_DRV Ctrl size        [0x100]

SHMDRV Ctrl DSP address [0x8fe05100]
SHMDRV Ctrl size [0x80]

LDRV_IPS Ctrl DSP address [0x8fe05180]
LDRV_IPS Ctrl size        [0x80]

LDRV_POOL Ctrl DSP address [0x8fe05200]
LDRV_POOL Ctrl size        [0x80]
SMAPOOL shared memory physical address [0x8fe05280]
SMAPOOL shared memory size             [0x70000]

MPCS Ctrl physical address [0x8fe75280]
MPCS Ctrl size             [0x8200]

MPLIST Ctrl physical address [0x8fe7d480]
MPLIST Ctrl size             [0x2200]

LDRV_MQT Ctrl DSP address [0x8fe7f680]
LDRV_MQT Ctrl size        [0x80]

ZCPYMQT Ctrl DSP address [0x8fe7f700]
ZCPYMQT Ctrl size [0x480]

LDRV_DATA Ctrl DSP address [0x8fe7fb80]
LDRV_DATA Ctrl size        [0x80]

ZCPYDATA Ctrl DSP address [0x8fe7fc00]
ZCPYDATA Ctrl size        [0x2e00]

SMAPOOL buffers start DSP address      [0x8fe05d00]

The defined size of the DSPLINKMEM1 region in the configuration is 0xFB000

The total size used by all modules for control region can be found through any one of two approaches:
1. Totalling the sizes from individual modules: 0x100 + 0x80 + 0x80 + 0x80 + 0x70000 + 0x8200 + 0x2200 + 0x80 + 0x480 + 0x80 + 0x2e00 =
7DA00

2. Looking at the DSP addresses to get the largest address in this memory region range:

ZCPYDATA Ctrl DSP address [0x8fe7fc00]
ZCPYDATA Ctrl size        [0x2e00]

Final address is: 0x8fe7fc0 + 0x2e00 = 0x8FE82A00
DSPLINKMEM1 start is at 0x8fe05000, so subtracting it from the final address: 0x8FE82A0 - 0x8fe05000 =
7DA00

Based on this, size of DSPLINKMEM region can be safely reduced to 0x7DA00.

POOL size[edit]

Out of the total shared memory consumption by DSPLink modules, the size for POOL control structure and buffers is 0x70000. <syntaxhighlight lang=c> STATIC CONST LINKCFG_Pool LINKCFG_poolTable_00 [] = {

   {
       "SMAPOOL",             /* NAME           : Name of the pool */
       (Uint32) 1,            /* MEMENTRY       : Memory entry ID (-1 if not needed) */
       (Uint32) 0x70000,      /* POOLSIZE       : Size of the pool (-1 if not needed) */
       (Uint32) -1,           /* IPSID          : ID of the IPS used */
       (Uint32) -1,           /* IPSEVENTNO     : IPS Event number associated with POOL */
       0x0,                   /* ARGUMENT1      : First Pool-specific argument */
       0x0                    /* ARGUMENT2      : Second Pool-specific argument */
   }

} ; </syntaxhighlight>

Pre-DSPLink v1.60[edit]

In DSPLink releases before 1.60, this was reserved for POOL control structures as well as buffers. Looking at the log:

SMAPOOL shared memory physical address [0x8fe05280]
SMAPOOL shared memory size             [0x70000]
SMAPOOL buffers start DSP address      [0x8fe05d00]

From this, we can find out that the buffers start from 0x8fe05d00, so the SMAPOOL control structures take up 0x8fe05d00 - 0x8fe05280 = 0xA80.

The rest, i.e. 0x6F580 (0x70000 - 0xA80) is only for the POOL buffers, and is completely dependent on application requirements, and the buffer sizes and numbers configured by the application for this pool.
For the DSPLink SMA POOL, if the buffers configured are:
L buffers of size A
M buffers of size B
N buffers of size C

The total buffer size = (L x A) + (M x B) + (N x C)

DSPLink v1.60 onwards[edit]

In DSPLink release 1.60 onwards, this region only contains POOL buffers. POOL control structures are placed along with control structures for other modules within the DSPLINKMEM / DSPLINKMEM1 regions.
This makes it very easy to calculate the exact size of shared memory required for the SMAPOOL by the following method: The size of POOL memory required dependent on application requirements, and the buffer sizes and numbers configured by the application for this pool.
For the DSPLink SMA POOL, if the buffers configured are:
L buffers of size A
M buffers of size B
N buffers of size C

The total buffer size = (L x A) + (M x B) + (N x C)

Total DSPLink module control structure requirements[edit]

From the above calculations, the total shared memory size used up by all DSPLink modules is:
Size of control structures except for POOL: 0x7DA00 - 0x70000 = 0xDA00
+
Size of POOL control structures = 0xA80

Total size = 0xE480

Conclusion[edit]

Even though DSPLink reserves a total of 1MB size (0x100000) by default in the configuration, the actual amount of shared memory required by DSPLink modules for its control structures is much lesser (only 0xE480 for DM6446 in DSPLink v1.50). Most of the memory is required for application's POOL configuration. The DSPLink configuration can be tuned for the most optimum memory usage by using the procedure mentioned on this page.

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