DMA controller pitfalls

Byte access to the DMA controller registers

Although the family users guide for the MSP430F54xx states, that all DMA controller registers have byte access (and also introduces _L and _H aliases for byte-accessing the registers), this is not true. Any write to DMAxxx_H instead goes into the low byte (DMAxxx_L). The same is true for read access. Reading DMAxxx_H returns the low byte of the register.

While this is not a problem in most cases, it is necessary to write the DMA triggers for DMA0 and DMA1 together into DMACTL0 using a word write. It is not possible to set them independently by writing to DMACTL0_L and DMACTL0_H.

Use DMACTL0=(DMACTL0&0xff00)|(trigger&0xff); for setting the trigger for DMA0 and DMACTL0=(DMACTL0&0x00ff)|(trigger<<8); for setting the trigger for DMA1.

This issue has been reported to TI and will be addressed in version F of the MSP430X5xx family user's guide SLAU208.