DA8xx Boot Sequence

Introduction

This page describes communication between host microcontroller (uC) and DSP when a Secondary Boot Loader (SBL) is used. SBL has below capabilities.

1. Auto boot: DSP boots itself after reset without communicating uC
2. Normal Boot: DSP boots itself after reset with communicationg uC. You can choose Boot or Flash update by command
3. Flash update: DSP updates its flash after reset with communicationg uC. You can choose Boot or Flash update by command

This section focusing 2 and 3 from host uC side.

Note 

In the boot process, all words should be treated as 32-bit, little endian. This is different from alpha commands where they are 16-bit, little endian.

Normal Boot (Boot PA/F from flash)

1. The uC releases DSP from the Reset State
2. Sync
   • The DSP sends MASTER_SLAVE_SYNC1 (0x22554411)
   • The uC responds MASTER_SLAVE_SYNC2 (0x33665577)
   • The DSP sends MASTER_SLAVE_SYNC3 (0x990033AA)
3. The uC sends non-MAGIC word, for example 0x12345678.
   • DSP understands normal boot is required.
4. uC sends the indirect value for the base address of the boot table in the flash memory.
   • FLASH_UPDATE_ADDRESS1 (0x11111111) for 0x00010000.
   • DSP starts loading PA application image from offset 0x00010000 in flash, to RAM.
   • After finishing loading, DSP starts running from the entry point.
5. DSP runs the main audio application.
6. The uC can start sending alpha commands to DSP.

How to make flash update image

• fimage.h, which is used to factory .bin can be used for update image
  • ex) coff2pfimg -b 0x00010000 -z -c fimage.h pa.out

• If you need binary file
  • ex) coff2pfimg -b 0x00010000 -z -u fimage.dat pa.out

• -z is compress option. You can remove if you don’t need compression. Note that you should delete pre-define of USE_COMPRESSION in sbl.pjt

Flash Update (Write PA application image to flash)

1. The uC releases DSP from the Reset State
2. Sync
   • The DSP sends MASTER_SLAVE_SYNC1 (0x22554411)
   • The uC responds MASTER_SLAVE_SYNC2 (0x33665577)
   • The DSP sends MASTER_SLAVE_SYNC3 (0x990033AA)
3. The uC sends MAGICWORD (0x15223759)
   • DSP understands that Flash Update is required.
4. DSP acknowledges by sending MAGICWORD.
5. The uC sends the number of boot image to be updated (0x0000001).
6. uC sends the indirect value for the base address of the boot table in the flash memory
   • FLASH_UPDATE_ADDRESS1 (0x11111111) for 0x00010000
7. The uC starts sending the value in the image generated by the utilites (coff2pfimg.exe) from the number of sections to the end of the table.
8. DSP writes the code to the flash memory. After that, DSP sends the checksum to the uC.
9. The uC reboot DSP.

More Detail about Parallel Flash Bootload

• sbl_mce in the SDK