CP Tracer Details

Introduction

The Common Platform Tracer (CPT) provides profiling, event logging and debug support for the slave bus a CPT module is integrated with. A device will typically have many CPT modules strategically provided on key slave buses. CPTs are completely unobtrusive to the slave's data flow. CPT statistics and events can be qualified to focus on a specific data source. CPT statistics profiling data is generated periodically while events are generated per access. CPT modules support cross-triggering. CP Tracer data is exported as System Trace Module (STM) messages that can be collected with an on-chip Embedded Trace Buffer (ETB) or exported over the device's EMU pins to an XDS560v2 System Trace or XDS Pro Trace.

Profiling

A CPT can export STM messages for the following statistics counters periodically:

• Throughput Counter 0: Counts bytes of slave acknowledged accesses
• Throughput Counter 1: Counts bytes of slave acknowledged accesses
• Wait Counter: Counts number cycles a master access must wait for the slave acknowledge
• Access Counter: Counts the number of unique transactions

The Throughput Counters can be filtered with with master, address, data type (CPU Instruction, CPU data, or DMA ) and access type (read or write). Each throughput counter has independent master selects, although the same address, data type and access type filters are applied to all selected masters. The Wait and Access Counters are not filtered.

The CPT's sample period counter advances at the clock rate of the slave bus the CPT is attached to. The clock rates for each slave can be found in the Device_Specific_Details.

Event Logging

Events are logged for the following slave bus events:

• New Request
• Last Read
• Last Write

New Request Events are filtered by master id, address, data type (CPU Instruction, CPU data, or DMA ) and access type (read or write). Last Read Events are filtered by the master id. Last Write events cannot be filtered. Event message provides the following data:

• New Request - Master Id, XID, R/W and Address
• Last Read - Master Id and XID
• Last Write - No additional data

For New Request Event messages only 10 bits of the event address is provided. The 10 bits of the address provided is selectable.

Warning - Multiple events can be enabled at the same time, although this is not recommended due to the high probability of message overflow.

Triggering

A CP Tracer can be enabled to generate a cross trigger-out or qualify statistic counting and event logging with a cross trigger-in. A cross trigger-out from a CP Tracer can be used to halt a core or as a trigger-in for AET functions. The trigger-in can be used to provide additional qualification from AET to isolate a slave bus CPT statistics or events to a specific range of application execution.

CP Tracer Setup

CP Tracers can be programmed through CToolsLib APIs (via CPTLib)  or with CCS  (see Overview) .

When using CCS, CP Tracer messages can be collected internally with the Embedded Trace Buffer (ETB) or externally with an XDS560v2 System Trace.

CPTLib requires integration with your application code, although helper functions are provided for easily setting up the most common use cases. When using CPTLib, CP Tracer messages can be collected internally with the device's ETB or exported out the EMU pins and collected with an XDS560v2 System Trace. If data is captured with ETB for a remote system where CCS is not connected the user must facilitate transport of the data to a host with CCS to process the CP Tracer data.

CP Tracer Use Cases and Data Processing

If CCS is used to setup the ETB (using any XDS) or an XDS560v2 System Trace for CP Tracer data capture, then CCS will be used to processes and display the data. If CPTLib is used with an ETB to facilitate remote CP Tracer data capture (no XDS involved) then the console utility bin2tdf is used to convert the binary CP Tracer data into a .tdf file that can then be imported into CCS's Tracer Analyzer for display and graphing.

There are four uses cases the CPT statistic counter periodic data can be processed for:

• Total Bandwidth Profile – Profile of master(s) as a % of total slave activity. Counter data is processed to provide:

1.  % of total slave activity utilized by selected master(s)
2. Slave Bus Bandwidth utilized by selected master(s)
3. Average Access Size of slave transactions
4. Bus Utilization
5. Contention Percentage
6. Minimum Average Latency

• Master Bandwidth Profile – Profile of two master(s)

1. Slave Bus Bandwidth utilized by master set 0
2. Slave Bus Bandwidth utilized by master set 1
3. Bus Utilization
4. Contention Percentage
5. Minimum Average Latency

• System Bandwidth Profile - Profile of the slave activity for all active masters. Counter data processed to provide MB/sec. Since only MB/sec data is provided, enabling multiple CP Tracers for System Bandwidth Profile provides visibility across multiple buses simultaneously.
• Raw - Periodic counters provided in their raw form with no processing. See the definitions from Profiling section.

Event data is not processed and can be enabled with any other use case.

The primary expectation for the Raw use cases is debugging problems where the number of bytes transferred to a slave is required.

CPTLib note: CPTLib utilizes the STM Library to provide a channel to transport meta-data required to process the data for the two profile use cases. If the meta-data is not provided data is presented in the "Raw" form.

Results

To see an example of Total Bandwidth Profile data graphed see the examples results.

Capturing CP Tracer data with an ETB

CP Tracer data is sent to the STM unit where it is formatted and time stamped, and then transmitted to either the ETB or out the pins of the device. In the ETB case, the STM unit uses a scaled time stamp that is applied to the messages. The scaling factor is dependent on the number of STM clocks for which no data was received by the STM unit. The STM module's clock rate for Keystone devices is system clock divided by 3.

• Scaled time stamp granularity starts at a 1 STM clock resolution (finest granularity). Any CP Tracer or Software Messages (from cores) that are received by the STM unit within the next 2^8 clocks are broadcast using the finest granularity.
• If there are no CP Tracer or Software Messages received by the STM unit within 2^8 STM clocks, the scaling granularity is increased by a 2^1 factor. If there are no messages received by the STM unit within the next 2^9 STM clocks, the scaling increases again by 2^1. Once the time stamp granularity reaches 2^6, it increases by a factor of 2^2 up to a maximum of 2^24.
• When a CP Tracer or Software Message is received by the STM unit, the message time stamp and current granularity are broadcast with the message. Time stamp scaling is reset to the finest granularity and the process starts over.

Device Specific Details

Each device has a unique CP Tracer configuration. The CP Tracer column shows which modules have a CP Tracer integrated on the slave bus. Clock Div column shows the divide-by-factor of the module relative to the system clock rate.

Errata 1 - CP Tracer cross trigger-in is a level and therefore not compatible with AET Trigger-out which is a pulse. No known workaround.

TMS320C6670 and TMS320TCI6616 CP Tracers

CP Tracer	Clock Div	Base Address
MSMC_0	2	0x01d00000
MSMC_1	2	0x01d08000
MSMC_2	2	0x01d10000
MSMC_3	2	0x01d18000
QM_M	3	0x01d20000
DDR	2	0x01d28000
SM	3	0x01d30000
QM_CFG	3	0x01d38000
CFG	3	0x01d40000
L2_0	3	0x01d48000
L2_1	3	0x01d50000
L2_2	3	0x01d58000
L2_3	3	0x01d60000
RAC	3	0x01d68000
RAC_CFG	3	0x01d70000
TAC	3	0x01d78000

TMS320C6672, TMS320C6674 and TMS320C6678 CP Tracers

CP Tracer	C6672	C6674	C6678	Clock Div	Base Address
MSMC_0	X	X	X	2	0x01d00000
MSMC_1	X	X	X	2	0x01d08000
MSMC_2	X	X	X	2	0x01d10000
MSMC_3	X	X	X	2	0x01d18000
QM_M	X	X	X	3	0x01d20000
DDR	X	X	X	2	0x01d28000
SM	X	X	X	3	0x01d30000
QM_CFG	X	X	X	3	0x01d38000
CFG	X	X	X	3	0x01d40000
L2_0	X	X	X	3	0x01d48000
L2_1	X	X	X	3	0x01d50000
L2_2		X	X	3	0x01d58000
L2_3		X	X	3	0x01d60000
L2_4			X	3	0x01d68000
L2_5			X	3	0x01d70000
L2_6			X	3	0x01d78000
L2_7			X	3	0x01d80000

TMS320C6657 CP Tracers

CP Tracer	Clock Div	Base Address
MSMC_0	2	0x01d00000
MSMC_1	2	0x01d08000
MSMC_2	2	0x01d10000
MSMC_3	2	0x01d18000
QM_M	3	0x01d20000
DDR	2	0x01d28000
SM	3	0x01d30000
QM_CFG	3	0x01d38000
CFG	3	0x01d40000
L2_0	3	0x01d48000
L2_1	3	0x01d50000
SCR_6P_A	3	0x01d58000

TMS320C6612 and TMS320TCI6614 CP Tracers

CP Tracer	Clock Div	Base Address
MSMC_0	2	0x01d00000
MSMC_1	2	0x01d08000
MSMC_2	2	0x01d10000
MSMC_3	2	0x01d18000
QM_M	3	0x01d20000
DDR	2	0x01d28000
SM	3	0x01d30000
QM_CFG	3	0x01d38000
CFG	3	0x01d40000
L2_0	3	0x01d48000
L2_1	3	0x01d50000
L2_2	3	0x01d58000
L2_3	3	0x01d60000
RAC	3	0x01d68000
RAC_CFG	3	0x01d70000
TAC	3	0x01d78000

How to Stop a CP Tracer

When using CCS to configure a CP Tracer use case you may need to control from your application when the CP Tracer is generating STM messages. You must read/modify/write the CP Tracers Export Select bits (bits 12:8 of register offset 0x08 from the CP Tracer Base address).

• Bit 8: 1 - Export Statistic messages 0 - Disable Statistic messages
• Bit 9: 1 - Export New Request Event messages 0 - Disable New Request Messages
• Bit 10: 1 - Export Last Read Event messages 0 - Disable Last Read Event messages
• Bit 11: 1 - Export Last Write Event messages 0 - Disable Last Write Event messages
• Bit 12: 1 - Export Access Status message 0 - Disable Access Status message