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AM335x SYSBIOS Industrial SDK 01.01.00.04 Release Notes
Content is no longer maintained and is being kept for reference only!
Feb 26, 2013
Contents
Introduction[edit]
The SYSBIOS-based software development kit (SDK) for industrial communications is designed for the Sitara AM335x ARM Cortex-A8 microprocessor family to enable customers add real-time industrial communications easily and quickly to their system. By making all the basic system software components immediately available, the Kit allows developers to focus on their application code, where they can add the most differentiation. Optimized to support real-time industrial communications protocols such as EtherCAT, Profibus, Profinet, Ethernet/IP and many others, the SDK includes a real-time, low-footprint SYSBIOS kernel with boot loader and sample industrial applications to get started quickly.
Device Support[edit]
The following devices are supported with the current release.
- SOC's supported
- AM335x
- Hardware Platform Supported
- AM335x IDK (also known as IA EVM)
- AM335x ICE V1/V2
Obtaining the Release Package[edit]
Documentation[edit]
The following documents are provided with this release.
What Is Supported[edit]
- Hardware Platform
- AM335x IDK (also known as IA EVM)
- AM335x ICE V1/V2
- SYSBIOS 6.35.04.50 Real Time Operating System
- VFP, MMU, L1/L2 cache, INTC support
- XDC Tools 3.25.03.72
- Starterware boot loader
- Boot from MMC/SD for IDK
- Boot from SPI flash and NOR flash for ICE
- Starterware based drivers integrated with SYSBIOS
- PRUSS
- Timer
- UART
- GPIO
- I2C
- Ethernet
- McSPI
- EtherCAT Slave Controller
- Beckhoff Slave Stack Version 5.10
- PRU Firmware load from SPI flash
- EtherCAT Commands
- 8 FMMU support in Firmware
- 8 SM support in Firmware (stack support only 4)
- 8KB process data RAM
- Distributed clocks
- 64-bit DC
- SYNC0 out generation single shot and cyclic mode support
- SYNC1 out generation - SYNC1 cycle time multiple of SYNC0 cycle time
- Latch0 and Latch1 inputs
- DL Loop Control
- Using PRU-ICSS MDIO state m/c (slow)
- Using MII_RX_LINK (fast - depending on PHY link loss detection latency)
- Enhanced link detection support using TLK105/TLK106/TLK110 PHY RX_ERR threshold counting feature
- Enhanced link detection in EtherCAT firmware
- EEPROM Emulation
- SPI flash non-volatile storage support
- Provisions to use volatile storage for debug and development
- Interrupts – AL/ECAT events
- Watchdog – PDI and SM
- Error Counters – all key counters
- LED – Run, Error and Port0/1 activity based on firmware feedback
- CoE, EoE, FoE and CiA402
- Management Interface for PHY over EtherCAT
- PHY address configuration and host side PRU-ICSS MDIO API for PHY programming
- Redundancy support validated using PG2.x silicon
- Application upgrade over FoE complying to SEMI TWG guidelines (not resetting PRU-ICSS)
- PROFIBUS DP Slave Controller
- Evaluation PROFIBUS DP slave stack library file from TMG
- Baud rates 12M, 6M, 3M, 1.5M, 500k, 187.5k, 93.75k, 45.45k 19.2k, 9.6k
- Telegram size Up to 244 bytes
- DPv0 support Cyclic exchange of data and diagnosis
- DPv1 support Acyclic/cyclic data exchange and alarm handling
- Response time 11-bit minimum TSDR response time
- Watchdog 10ms time base
- Get diagnostics and extended diagnostics
- EtherNet/IP
- EtherNet/IP adapter implementation on low latency ICSS cut-thru switch as well as on Gigabit hardware switch (CPSW)
- Integrated with Molex Ethernet/IP adapter stack Version 3.1.3.1 supporting the following features
- Ethernet/IP Capabilities
- Explicit Messaging and Implicit Messaging
- UCMM
- Class 1 and Class 3 Connection
- Supported CIP Objects
- Identity
- Message Router
- Assembly
- Connection Manager
- Ethernet Link
- TCP/IP Interface
- DLR - Beacon based ring node
- Ethernet/IP Capabilities
- Compliant with ODVA EtherNet/IP Protocol Conformance Test Tool (Rev CT-10)
- PROFINET
- PROFINET I/O Device(slave) conforms to PROFINET Conformance classes A and B functionality.
- Integrated with Molex PROFINET stack
- PROFINET I/O Device Features:
- Supports minimum cycle time of 250 us
- Integrated two-port cut-through switch, 100 Mb/s Full Duplex
- Profinet Quality of Service(QoS)
- Upto 8 Application Relations (ARs)
- Data Hold Timer
- DCP Identify Filter
- 1 ms buffering per port
- 8 IOCR with 40..1440 Bytes
- 802.1d learning bridge for received source MAC addresses
- PNIO static routing and custom FDB for multicast addresses
- Compliant with PROFINET IO Tester Version 2.2.4.16.21
- Sample Applications
- HTTP Server
- UART Echo
- LED Control
- EtherCAT slave
- EtherNet/IP Adapter
- Profibus DP Slave
- Profinet Slave
- HTTP Server
- Host Development Platform And Toolchain
- CCS V5.5 on Windows PC
- TI TMS470 Codegen Tool 5.0.6 for Cortex-A8 (part of CCS5.4)
What Is Not Supported[edit]
- In general, peripherals or features not mentioned as part of "What is Supported" section are not supported in this release.
- For EtherCAT Slave Controller, the following features are not supported in this release. These are planned to be supported in upcoming releases
- Distributed Clocks (DC)
- System Time difference filter depth (0x934) other than 0, 2, 4, 8 and 16 - any value not listed will be rounded to next power of 2
- Speed Counter filter depth (0x935) other than 0, 2, 4, 8 and 16 - any value not listed will be rounded to next power of 2
- ECAT side register protection when using LRD command
- APRW/FPRW/BRW for SM mapped area
- Distributed Clocks (DC)
- For PROFIBUS DP Slave, the following features are not supported in this release
- DP-V2 support for asynchronous mode and data exchange
- PA support
- Set_Slave_Add (SAP 55) support
- For EtherNet/IP Adapter application
- IEEE 1588/PTP feature
- Half duplex on ICSS Switch
- For PROFINET slave application
- Media redundancy protocol
- Fast start up
- Firmware and Driver support upto 8 ARs but currently Stack integration is limited to one AR.
New In This Release[edit]
- EtherCAT
- Distributed clocks - Speedcounter filter support in firmware for improved drift compensation
- Bug fixes (see below)
- Ethernet/IP
- Beacon based DLR slave node support
Fixed In This Release[edit]
Issue Identifier | Issue Description | Status |
---|---|---|
SDOCM00103423 | EtherCAT: Back to INIT timeout on ICE-V2.1 is seen during firmware upgrade | Fixed |
SDOCM00104422 | EtherCAT: Digital Inputs not updated on IDK | Fixed |
SDOCM00105357 | EtherCAT: Enhanced link detection bit not updated in port status 0x110 bit 2 | Fixed |
SDOCM00106487 | EtherCAT: ESI EEPROM modifications made in INIT/PREOP states are lost upon power off/reset without transition to PREOP/INIT in ICE2/IDK EVMs | Fixed |
SDOCM00106811 | EtherCAT: Unable to go to OP state with SYNC1 enabled (DC mode) - appeared after applying SSC5.10 bugfix posted in EtherCAT forums | Fixed |
SDOCM00106812 | EtherCAT: SM Watchdog status reads "expired" when no output process data is configured | Fixed |
SDOCM00105819 | PROFIBUS: Only the first 128 bytes of slave's response reaches PROFIBUS master during input change | Fixed |
SDOCM00106780 | PROFIBUS: Using any value between 0 and 31 as PRU EDMA channel does not work, except for specific channel no's E.g.:- 3 | Fixed |
SDOCM00106260 | Bootloader: SPI Bootloader crash due to stack corruption, causing JTAG connectivity issues on ICEv2 | Fixed |
Known Issues And Limitations[edit]
Issue Identifier | Issue Description | Workaround |
---|---|---|
SDOCM00098105 | EtherCAT: PDI/PD watchdog counter incremented by 1 whenever PDI/PD watchdog is disabled | None |
SDOCM00098950 | EtherCAT:LRD access on unused registers increment WKC - no register protection while using LRD | None |
SDOCM00097012 | EtherCAT: SYNC0 jitter varies with distance of slave from reference | None |
SDOCM00092510 | EtherCAT: Multiple FMMU access in a single datagram to a slave for process data using LRD/LWR commands | Use LRW instead of LRD/LWR |
SDOCM00105048 | EtherCAT: LRW access to non-interleaved input and output process data of multiple slaves does not work. SOEM accesses slaves in LRW mode this way | Use LRD/LWR for process data access or use more optimal interleaved access for process data access from Master (TwinCAT way) |
SDOCM00103424 | CPSW driver does not work in 10Mbps mode | None |
NA | Ethernet/IP: Two errors during TCP/IP interface test in CTT V 10 | CTT limitation. |
SDOCM00106802 | Ethernet/IP: Seven errors during DLR Object test in CTT V 10 | None |
SDOCM00105257 | On ICEV2, Ethernet/IP application in CPSW mode doesn't connect with EIP Tool. (This is found to be problem with i2c communication to clock synthesizer which proivde clock to RMII ports) | Increase delay in between i2c operations by setting Task_sleep as the delay function. This fix is already available SDK. |
More details on EtherCAT known issues can be found here
More details on PROFIBUS known issues can be found here
Dependencies[edit]
Refer to System Requirements section in AM335x Industrial SDK Getting Started Guide.
Technical Support and Product Updates[edit]
For further information or to report any problems, contact http://community.ti.com or http://support.ti.com.