AM335x SYSBIOS Industrial SDK 01.00.00.05 Release Notes

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AM335x SYSBIOS Industrial SDK 01.00.00.05 Release Notes

Sep 28, 2012

Introduction

The SYSBIOS-based software development kit (SDK) for industrial communications is designed for the Sitara AM335x ARM Cortex-A8 microprocessor family to enable customers add real-time industrial communications easily and quickly to their system. By making all the basic system software components immediately available, the Kit allows developers to focus on their application code, where they can add the most differentiation. Optimized to support real-time industrial communications protocols such as EtherCAT, Profibus, Profinet, Ethernet/IP and many others, the SDK includes a real-time, low-footprint SYSBIOS kernel with boot loader and sample industrial applications to get started quickly.

Device Support

The following devices are supported with the current release.

• SOC's supported
  • AM335x
• Hardware Platform Supported
  • AM335x IDK (also known as IA EVM)
  • AM335x ICE 
    

Obtaining the Release Package

• AM335x SYSBIOS Industrial SDK Download Page

Documentation

The following documents are provided with this release.

• AM335x Industrial SDK Getting Started Guide
• AM335x Industrial SDK User Guide
  

What Is Supported

• Hardware Platform
  • AM335x IDK (also known as IA EVM)
  • AM335x ICE
• SYSBIOS 6.33.05.46 Real Time Operating System
  • VFP, MMU, L1/L2 cache, INTC support
  • XDC Tools 3.23.03.53
• Starterware boot loader
  • Boot from MMC/SD for IDK
  • Boot from SPI flash and NOR flash for ICE
• Starterware based drivers integrated with SYSBIOS
  • PRUSS
  • Timer
  • UART
  • GPIO
  • I2C
  • Ethernet
    
• EtherCAT Slave Controller
  • Beckhoff Slave Stack Version 5.01
  • PRU Firmware load from SPI flash
    
  • EtherCAT Commands
  • 8 FMMU support in Firmware
  • 8 SM support in Firmware (stack support only 4)
  • Distributed clocks
    • 32-bit DC
    • SYNC0 out generation single shot and cyclic mode support
    • SYNC1 out generation - SYNC1 cycle time multiple of SYNC0 cycle time
    • Latch0 and Latch1 inputs
  • DL Loop Control
    • Using PRU-ICSS MDIO state m/c (slow)
    • Using MII_RX_LINK (fast - depending on PHY link loss detection latency)
    • Enhanced link detection support using TLK105/TLK106/TLK110 PHY RX_ERR threshold counting feature
    • Enhanced link detection in EtherCAT firmware
  • EEPROM Emulation
    • SPI flash non-volatile storage support
    • Provisions to use volatile storage for debug and development
  • Interrupts – AL/ECAT events
  • Watchdog – PDI and SM
  • Error Counters – all key counters
  • LED – Run, Error and Port0/1 activity based on firmware feedback
  • CoE, EoE and FoE
  • Management Interface for PHY over EtherCAT
  • PHY address configuration and host side PRU-ICSS MDIO API for PHY programming
• Profibus DP Slave Controller
  • Evaluation PROFIBUS DP slave stack library file from TMG
  • Baud rates 12M, 6M, 3M, 1.5M, 500k, 187.5k, 93.75k, 45.45k 19.2k, 9.6k
  • Telegram size Up to 244 bytes
  • DPv0 support Cyclic exchange of data and diagnosis
  • DPv1 support Acyclic/cyclic data exchange and alarm handling
  • Response time 11-bit minimum TSDR response time
  • Watchdog 10ms time base
  • Get diagnostics and extended diagnostics
• Powerlink Slave
  • openPOWERLINK Stack Version V1.7.1.
  • Data link layer and NMT state machine for controlled nodes.
  • SDO via EPL ASND frames.
  • openMAC and openHUB
  • API for PHY programming.
  • Interoperable with B&R X20BC slaves.
  • Interoperable with openPOWERLINK master and B&R PLC (Power Panel 500)
  • Run LED
  • Cycle time till 400 us
• Sample Applications
  • HTTP Server
    
  • UART Echo
  • LED Control
  • EtherCAT slave
  • Profibus DP Slave
  • Powerlink Slave
• Host Development Platform And Toolchain
  • CCS V5.2 on Windows PC
  • TI TMS470 Codegen Tool 4.9.5 for Cortex-A8 (part of CCS5.2)

What Is Not Supported

• In general, peripherals or features not mentioned as part of "What is Supported" section are not supported in this release.
• For EtherCAT Slave Controller, the following features are not supported in this release. These are planned to be supported in upcoming releases
  • Distributed Clocks (DC)
    • System Time difference filter depth (0x934) other than 0,2,4 and 8
    • Speed Counter filter depth (0x935)- Not used by EtherCAT firmware
  • Redundancy
  • PDI side register permissions
  • APRW/FPRW/BRW for SM mapped area
• For Powerlink Slave, following feautures are not supported in this release
  • SDO over UDP.
  • Shared Buffer functionality
  • OpenMAC doesn’t have Collision detection functionality implemented yet.
• For PROFIBUS DP Slave, the following features are not supported in this release
  • DP-V2 support for asynchronous mode and data exchange
  • PA support
  • Set_Slave_Add (SAP 55) support

New In This Release

• EtherCAT
  • LRW for process data
  • Fast link loss detection using MII_RX_LINK and RX_ERR based link detection with TLK110 PHY
  • Distributed clocks support
    • SYNC1 out, Latch0/1 input support
  • Non-volatile ESI EEPROM support on IDK
  • PRU firmware storage in SPI Flash on IDK
  • PDI performance improvement
    • Seperate high priority and low priority command channels for process data and mailbox/register access
• Ethernet Driver integrated with lwip stack
  • Ethernet driver supporting single port CPSW (Gigabit Switch) interface (available only on IDK)
  • Driver integrated with lwip stack
  • Sample http server application
    
• Updated SDK Tools
  • post_build script updated. Now,all projects by default genartes binaries for SD card and SPI Flash
    
  • New concatenating tool(isdk_merge) to concatenate ARM and PRU binaries
    
  • SPI Flasher tool updated
    

Fixed In This Release

Issue Identifier	Issue Description	Status
SDOCM00093179	EEPROM write via CTT tool does not update non-voltaile storage always	Fixed
SDOCM00093245	System Time difference shows non-zero value when TI ESC is reference	Fixed
SDOCM00093328	EoE is broken in ISDK 1.00.00.04	Fixed
SDOCM00094894	Issue with MDIO phy address specification via host interface to firmware	Fixed
SDOCM00095428	Host API for MDIO PHY write requires delay between read and write for certain PHY configuration	Fixed
SDOCM00093568	Burst write ESC register space > 64 bytes does not work	Fixed
SDOCM00092831	Two dffferent FMMU entries for same logical address, but different directions not supported	Fixed
SDOCM00096038	Error nibble is not inserted on CRC error preventing forwarded error detection at subsequent slaves	Fixed

More details on EtherCAT known issues can be found here.

Known Issues And Limitations

Issue Identifier	Issue Description	Workaround
SDOCM00093324	Powerlink: Connection for SDO transfer between master and slave may fail to establish sometimes	None
SDOCM00093325	Powerlink: OpenHub fails to forward non-powerlink or large sized frames	None
SDOCM00096119	EtherCAT: ISR raised for SYNC signal is sometimes missed in cyclic mode	None
SDOCM00092510	EtherCAT: Single datagram accessing multiple FMMU mapped areas	Split the access spanning multiple FMMUs to seperate datagrams

Dependencies

Refer to System Requirements section in AM335x Industrial SDK Getting Started Guide.

Technical Support and Product Updates

For further information or to report any problems, contact http://community.ti.com or http://support.ti.com.